The 8L30110 is a low skew, 1-to-10 LVCMOS / LVTTL Fanout Buffer. The low impedance LVCMOS/LVTTL outputs are designed to drive 50Ω series or parallel terminated transmission lines. 

The 8L30110 is characterized at full 3.3V and 2.5V, mixed 3.3V/2.5V, 3.3V/1.8V, 3.3V/1.5V, .5V/1.8V and 2.5V/1.5V output operating supply modes. The input clock is selected from two differential clock inputs or a crystal input. The differential input can be wired to accept a single-ended input. The internal oscillator circuit is automatically disabled if the crystal input is not selected.

特性

  • Ten LVCMOS / LVTTL outputs up to 200MHz
  • Differential input pair can accept the following differential input levels: LVPECL, LVDS, HCSL
  • Crystal Oscillator Interface
  • Crystal input frequency range: 8MHz to 50MHz
  • Output skew: 63ps (typical)
  • Additive RMS phase jitter: 22fs (typical)
  • Power supply modes:
    Core / Output
    3.3V / 3.3V
    3.3V / 2.5V
    3.3V / 1.8V
    3.3V / 1.5V
    2.5V / 2.5V
    2.5V / 1.8V
    2.5V / 1.5V
  • • -40°C to 85°C ambient operating temperature
  • • Lead-free (RoHS 6) packaging

产品选择

下单器件 ID Part Status Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Active 32 I 是的 Tray
Availability
Active 32 I 是的 Reel
Availability

文档和下载

文档标题 其他语言 类型 文档格式 文件大小 日期
数据手册与勘误表
8L30110 Datasheet 数据手册 PDF 707 KB
应用指南 &白皮书
AN-828 Termination - LVPECL 应用文档 PDF 322 KB
AN-845 Termination - LVCMOS 应用文档 PDF 146 KB
AN-844 Termination - AC Coupling Clock Receivers 应用文档 PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-834 Hot-Swap Recommendations 应用文档 PDF 153 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
PCN / PDN
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility 产品变更通告 PDF 983 KB
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location 产品变更通告 PDF 596 KB
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location 产品变更通告 PDF 544 KB
其他
Clock Distribution Overview 日本語 概览 PDF 217 KB
Timing Solutions Products Overview 概览 PDF 4.11 MB
IDT Clock Generation Overview 日本語 概览 PDF 1.83 MB
IDT Fanout Buffers Product Overview 产品简述 PDF 739 KB
High-Performance, Low-Phase Noise Clocks Buffers product brief 产品简述 PDF 378 KB