The 8535I-31 is a low skew, high performance 1-to-4 3.3V Crystal Oscillator/LVCMOS-to-3.3V LVPECL fanout buffer. The 8535I-31 has selectable single ended clock or crystal inputs. The single ended clock input accepts LVCMOS or LVTTL input levels and translate them to 3.3V LVPECL levels. The output enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 8535I-31 ideal for those applications demanding well defined performance and repeatability.

特性

  • Four differential 3.3V LVPECL outputs
  • Selectable LVCMOS/LVTTL CLK or crystal inputs
  • CLK can accept the following input levels: LVCMOS, LVTTL
  • Maximum output frequency: 266MHz
  • Output skew: 30ps (typical)
  • Part-to-part skew: 200ps (maximum)
  • Propagation delay: 1.75ns (maximum)
  • Additive phase jitter, RMS: 0.057ps (typical)
  • Full 3.3V supply mode
  • -40°C to 85°C ambient operating temperature
  • Replaces the ICS8535I-11
  • Available in both standard (RoHS 5) and lead-free (RoHS 6) packages

产品选择

器件号 Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
8535AGI-31LF
Active TSSOP 20 I 是的 Tube
Availability
8535AGI-31LFT
Active TSSOP 20 I 是的 Reel
Availability

文档和下载

文档标题 其他语言 类型 文档格式 文件大小 日期
数据手册与勘误表
8535I-31 Datasheet 数据手册 PDF 1.72 MB
应用指南 &白皮书
AN-828 Termination - LVPECL 应用文档 PDF 322 KB
AN-844 Termination - AC Coupling Clock Receivers 应用文档 PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-834 Hot-Swap Recommendations 应用文档 PDF 153 KB
AN-836 Differential Input to Accept Single-ended Levels 应用文档 PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced 应用文档 PDF 160 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
PCN / PDN
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly 产品变更通告 PDF 611 KB
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly 产品变更通告 PDF 611 KB
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location 产品变更通告 PDF 596 KB
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location 产品变更通告 PDF 544 KB
PCN# : TB1503-01R1 Carrier Tape Standardization for Selective Packages 产品变更通告 PDF 333 KB
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages 产品变更通告 PDF 95 KB
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages 产品变更通告 PDF 50 KB
PCN# : TB1503-01 Carrier Tape Standardization for Selective Packages 产品变更通告 PDF 291 KB
PCN# : A1309-01 Changed of Traceability Mark Format 产品变更通告 PDF 439 KB
PDN# : N-12-22R2 PRODUCT DISCONTINUANCE NOTICE 产品停产通告 PDF 363 KB
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products 产品变更通告 PDF 361 KB
PDN# : N-12-22R1 PRODUCT DISCONTINUANCE NOTICE 产品停产通告 PDF 209 KB
其他
Clock Distribution Overview 日本語 概览 PDF 217 KB
IDT Clock Generation Overview 日本語 概览 PDF 1.83 MB
IDT Fanout Buffers Product Overview 产品简述 PDF 739 KB
High-Performance, Low-Phase Noise Clocks Buffers product brief 产品简述 PDF 378 KB