概览

The ICS581-01 is a glitch free, Phase Locked Loop (PLL) based clock multiplexer (mux) with zero delay from input to output. It has have four low skew outputs which can be configured as a single output, three outputs,
or four outputs. The ICS581-01 allows user control over the mux switching. The ICS581-01 is a member of IDT’s ClockBlocksTM family of clock generation, synchronization, and distribution devices. For a non-PLL based clock mux, see the ICS580-01.
581-01 - Block Diagram
581-01 - Pinout
581-01 - Block Diagram
581-01 - Pinout
  • 16-pin TSSOP package
  • RoHS compliant packaging
  • No short pulses or glitches on output
  • Operates from 6 to 200 MHz
  • Low skew outputs
  • User controlled (-01) or automatic, timed mux switch (-02)
  • Ideal for systems with back-up or redundant clocks
  • Zero delay (input to output)
  • 50% output duty cycle allows duty cycle correction
  • SpreadSmartTM technology works with spread spectrum parts

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设计和开发

ECAD 模块

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.

扩展 ECAD 模块
Diagram of ECAD Models

产品选择

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    购买 / 样片
    器件号
    581G-01ILF
    circle过时
    memory
    view_in_ar
    		TSSOP 16 I Yes Tube
    581G-01ILFT
    circle过时
    memory
    view_in_ar
    		TSSOP 16 I Yes Reel
    581G-01LF
    circle过时
    memory
    view_in_ar
    		TSSOP 16 C Yes Tube
    581G-01LFT
    circle过时
    memory
    view_in_ar
    		TSSOP 16 C Yes Reel
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