Signal Processing Library (Standard Version)

Signal Processing Library is provided in both Floating and Fixed-Point format for representative MPUs and MCUs.

Target Devices

• SuperH RISC engine Family (SH2A-FPU) - (available for user to download)
• SuperH RISC engine Family (SH4A) - Finished development but testing (will be uploaded after testing)
• RX Family RX600 Series - (available for user to download)
• M16C Family R32C/100 Series - Under development (will be available in near future)

Overview

The signal processing library contains various primitive DSP functions such as FIR, IIR and FFT. There are different libraries offered on a variety of Renesas CPU families, tool chain and OS configurations. These functions are fine-tuned and optimized for various architectures.

This product provides the basic signal processing library (SPL) functions necessary for building signal processing applications using High-performance Embedded Workshop (HEW) that uses "C/C++ Compiler Package for SuperH Family" (SHC compiler) or any other appropriate environments (Eg: QNX, Wince etc). (See the conceptual image shown below.)

The signal processing library (SPL) is used in wafer positioning equipment, automobile application, Acoustic Echo Canceller (AEC), speech processing, Knock sensing, image processing and other applications. Speedy development as well as cost reduction of such devices can be achieved via a combination of Renesas microcontrollers, Renesas middleware, and Renesas development tools (compilers, debuggers, etc.).

SPL evaluation sample code is also available. For details, please refer to "Application Notes and Sample code".

SP Libraries are available in different configuration on different targets. They are as shown in the below block diagram.

Note

• FFF - Input - Float, SPL Internal computation - Float, Output - Float
• IFI - Input - Integer, SPL Internal computation - Float, Output - Integer
• III - Input - Integer, SPL Internal computation - Integer, Output - Integer
• The target blocks with solid line are completed or under development phase. But the blocks with dotted lines are to be done (TBD) and will be added in future.