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STB SoC for Digital TV Broadcasting Markets in Japan and South America


 

Overview Target System Product Specification Block Diagram

 


Overview

μPD61350 - μPD61353

The EMMA3TS (μPD61350, μPD61353) SoC is targeted for STBs. The EMMA3TS SoC integrates on a single chip the functions needed to receive digital broadcasts, including (1) demodulator circuits for the ISDB-T terrestrial digital broadcast format used in Japan and South America, and circuits for the ISDB-S satellite broadcast format used in Japan, (2) decoder circuits for the MPEG2 and H.264 video compression standards, and (3) peripheral interface circuits, such as USB 2.0 and Ethernet. These key features make it easy for system manufacturers to build TVs and STBs with support for digital broadcasts.








Target System

  • STB SoC for Digital TV Broadcasting Markets in Japan and South America (ISDB-T format)

Product Specification

Product Specification
On-chip CPU
  • Main CPU: MIPS32® 4KEc™ core
  • Sub CPU: MIPS32 4KEc core
Memory Interfaces
  • DDR2 memory interface
    • DDR2 800MHz
    • Support for max. 256MB capacity
    • Bus width: 16bits
  • NAND Flash ROM interface
    • Support for max. 2Gb capacity
    • Supports 8-bit bus width
OFDM Channel Decoder
  • ISDB-T 13-segment OFDM channel decoder
  • Support for IF (57 MHz), low IF (4 MHz)
8PSK Channel Decoder
  • ISDB-S 8PSK demodulator
  • Support for IQ input
MPEG Transport Stream Processing Engine
  • Stream input I/F
  • Support for transport streams conforming to MPEG standard
Video Decoder
  • Conforms to MPEG2 MP@HL
  • MPEG4 AVC decoder HP@L4.0
JPEG Decoder
  • Baseline support for decoding at 8,000 x 8,000 pixels
Analog Video Outputs
  • Composite analog video output/component analog video output
  • 3-channel DAC on-chip for video output
Audio Controller
  • Support for MPEG1/MPEG2 layers 1/2, MP3
  • Support for MPEG2 AAC, Dolby Digital, LPCM
  • Support for SPDIF output
Display and Graphics
  • 1 video plane
  • 7 x 5 tap video scaler
  • 2 OSD planes
Peripherals
  • USB 2.0 host controller x 1 line
  • Ethernet controller x 1 line
  • UART x 2 lines
  • Smartcard I/F x 1
  • I2C x 2 lines
  • Clocked serial I/F
  • IR receiver/blaster
  • Timer



Block Diagram

Block Diagram



Inquiry Concerning Digital AV LSI



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