H8/3827R, 3827S, 38327, 38427

• General-register architectureGeneral registers: Sixteen 8-bit registers (can be used as eight 16-bitregisters)
• Operating speed
  • Max. operating speed: 8 MHz
  • Add/subtract: 0.25 µs (operating at 8 MHz)
  • Multiply/divide: 1.75 µs (operating at 8 MHz)
  • Can run on 32.768 kHz or 38.4 kHz subclock
• Instruction set compatible with H8/300 CPU
  • Instruction length of 2 bytes or 4 bytes
  • Basic arithmetic operations between registers
  • MOV instruction for data transfer between memory and registers
• Typical instructions
  • Multiply (8 bits × 8 bits)
  • Divide (16 bits ÷ 8 bits)
  • Bit accumulator
  • Register-indirect designation of bit position

• 13 external interrupt sources (IRQ4 to IRQ0, WKP7 to WKP0)
• 23 internal interrupt sources

Two on-chip clock pulse generators

• System clock pulse generator
  • Maximum 16 MHz (H8/3827R, H8/38327, H8/38427 Group)
  • Maximum 10 MHz (H8/3827S Group)
• Subclock pulse generator: 32.768 kHz, 38.4 kHz

Seven power-down modes

• Sleep (high-speed) mode
• Sleep (medium-speed) mode
• Standby mode
• Watch mode
• Subsleep mode
• Subactive mode
• Active (medium-speed) mode

Large on-chip memory

• H8/3822R, H8/38322, H8/38422^*2:16-Kbyte ROM, 1-Kbyte RAM
• H8/3823R, H8/38323, H8/38423^*2:24-Kbyte ROM, 1-Kbyte RAM
• H8/3824R, H8/3824S, H8/38324, H8/38424^*2:32-Kbyte ROM, 2-Kbyte RAM
• H8/3825R, H8/3825S, H8/38325, H8/38425^*2:40-Kbyte ROM, 2-Kbyte RAM
• H8/3826R, H8/3826S, H8/38326, H8/38426^*2:48-Kbyte ROM, 2-Kbyte RAM
• H8/3827R, H8/3827S, H8/38327, H8/38427^*2:60-Kbyte ROM, 2-Kbyte RAM

• 64 pins
  • 55 I/O pins
  • 9 input pins

Six on-chip timers

• Timer A: 8-bit timerCount-up timer with selection of eight internal clock signals dividedfrom the system clock (φ)^*1 and four clock signals divided from thewatch clock (φW)*¹
• Asynchronous event counter: 16-bit timer
  • Count-up timer able to count asynchronous external eventsindependently of the MCU's internal clocks
• Timer C: 8-bit timer
  • Count-up/down timer with selection of seven internal clock signalsor event input from external pin
  • Auto-reloading
• Timer F: 16-bit timer
  • Can be used as two independent 8-bit timers
  • Count-up timer with selection of four internal clock signals or eventinput from external pin
  • Provision for toggle output by means of compare-match function
• Timer G: 8-bit timer
  • Count-up timer with selection of four internal clock signals
  • Incorporates input capture function (built-in noise canceler)
• Watchdog timer
  • Reset signal generated by overflow of 8-bit counter

Two serial communication interface channels on chip

• SCI3-1: 8-bit synchronous/asynchronous serial interfaceIncorporates multiprocessor communication function
• SCI3-2: 8-bit synchronous/asynchronous serial interfaceIncorporates multiprocessor communication function

Pulse-division PWM output for reduced ripple

• Can be used as a 14-bit D/A converter by connecting to an external low-pass filter.

Successive approximations using a resistance ladder

• 8-channel analog input pins
• Conversion time: 31/φ or 62/φ per channel

LCD controller/driver equipped with a maximum of 32 segment pins and four common pins

• Choice of four duty cycles (static, 1/2, 1/3, or 1/4)
• Segment pins can be switched to general-purpose port function in 8-bit units