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RZ/A1

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RZ/A1L

 

Maximum 10 MB on-chip large-capacity RAM enables more compact system size

Maximum 10 MB on-chip RAM enables image data for two screens of WXGA size image display to be recorded (used as frame buffer) without external SDRAM. Compared to the WVGA size (800 x 480 pixels) display of previous Renesas products, the product can be expanded to WXGA size without adding external SDRAM, enabling a more compact size to be obtained. Since external SDRAM is unnecessary, issues concerning the cost of SDRAM, mounting area, power consumption, noise, stable long-term supply, and so on can also be solved.

High-speed operation of CPU with maximum operating frequency of 400 MHz supports high performance and high functionality of system

To achieve high-speed access to the large-capacity RAM, faster digital audio signal processing, and so on, the maximum operating frequency of the CPU was increased by 1.5 times from the previous Renesas product to 400 MHz. When the RAM is used for program storage, CPU performance can be maximized. Systems with advanced functionality—such as, for example, using voice commands while music is playing or reducing noise in hands-free phone sets—can be supported.

Solutions fusing Renesas' experience and the ARM ecosystem help shorten prototype development time and reduce development costs

The new product offers to users advanced hardware technology as well as optimal solutions for the human machine interface field that fuse Renesas' experience in the microprocessor business and the global ecosystem of ARM partners. This contributes to shortened prototype development time and a great reduction in development costs.

The ARM ecosystem: A collection of OS, compiler, and debugger developers, solution providers, and other businesses centered around the same CPU architecture.
The term ecosystem is borrowed from the biological ecosystem, which is a system formed by the interaction of a community of living organisms with their environment.

RZ/A1H, RZ/A1M Group Block Diagram

Specifications that differ between products (RZ/A1H & M and RZ/A1L) are shown in red.


RZ/A1L Group Block Diagram

Specifications of the RZ/A1H, RZ/A1M, and RZ/A1L

Item RZ/A1H RZ/A1M (Under development) RZ/A1L
Part name/use/
package

256
-pin

R7S721000VLFP R7S721010VLFP 176
-pin
R7S721020VLFP
Car Accessory Car Accessory Car Accessory
256-pinQFP (28mm×28mm)
0.4mm pitch
256-pinQFP (28mm×28mm)
0.4mm pitch
176-pinQFP (24mm×24mm)
0.5mm pitch
R7S721000VCFP R7S721010VCFP R7S721020VCFP
Industry usage etc. Industry usage etc. Industry usage etc.
256-pinQFP (28mm×28mm)
0.4mm pitch
256-pinQFP (28mm×28mm)
0.4mm pitch
176-pinQFP (24mm×24mm)
0.5mm pitch
R7S721000VCBG R7S721010VCBG R7S721020VCBG
Industry usage etc. Industry usage etc. Industry usage etc.
256-pinBGA (11mm×11mm)
0.5mm pitch
256-pinBGA (11mm×11mm)
0.5mm pitch
176-pinBGA (8mm×8mm)
0.5mm pitch
324
-pin
R7S721001VLBG R7S721011VLBG 208
-pin
R7S721021VLFP
Car Accessory Car Accessory Car Accessory
324-pinBGA (19mm×19mm)
0.8mm pitch
324-pinBGA (19mm×19mm)
0.8mm pitch
208-pinQFP (28mm×28mm)
0.5mm pitch
R7S721001VCBG R7S721011VCBG
R7S721021VCFP
Industry usage etc. Industry usage etc.
Industry usage etc.
324-pinBGA (19mm×19mm)
0.8mm pitch
324-pinBGA (19mm×19mm) 0.8mm pitch 208-pinQFP (28mm×28mm)
0.5mm pitch
Power supply voltage
3.3V/1.18V
Maximum operating frequency
400MHz
CPU core
ARM Cortex-A9 (with Jazelle and NEON)
On-chip RAM
Large-capacity memory: 10 MB
Large-capacity memory: 5 MB Large-capacity memory: 3 MB
(For video display/work area; 128 KB are shared with data retention)
Cache memory
Primary cache memory: 64 KB (separated 32K instruction/32K data, TLB128 entry)
Secondary cache memory: 128 KB (with CoreLink™ Level 2 Cache Controller L2C-310)
External memory
Bus clock: up to 66.67 MHz
Direct connection to SRAM, byte select SRAM, SDRAM, and
burst ROM (clock synchronous/clock asynchronous) using bus state controller.
Address/data multiplexer I/O (MPX) interface supported.
Address space: 64 MB × 6
Data bus width: external 8/16/32 bits
Graphics functions
OpenVG1.1 2D graphics accelerator
-
Video display controller
(2 channels of video input and 2 channels of panel output,
of which 1 channel supports LVDS)
Video display controller
(1 channel of video input and 1 channel of panel output)
Video decoder × 2 channels (analog composite direct input is possible) -
Distortion correction engine × 2 channels (requires nondisclosure agreement) -
Distortion correction engine for display (requires nondisclosure agreement) -
Display out compare unit -
JPEG codec unit -
Capture engine unit (CMOS camera interface)
Pixel format converter × 2 channels -
Audio functions
SCUX (with built-in asynchronous sampling rate conversion, digital volume & mute, and mixer function)
Serial sound interface × 6 channels Serial sound interface × 4 channels
Renesas SPDIF interface
Sound generator × 4 channels -
CD-ROM decoder
Timer functions
Multifunction 16-bit timer (MTU2) × 5 channels
32-bit OS timer × 2 channels
Motor control PWM timer × 8 channels -
Watchdog timer
Real-time clock
Connectivity functions
USB 2.0 host/function module × 2 channels (host or functon selectable)
NAND flash interface -
SD host interface × 2 channels (must obtain SD card license)
MMC host interface
Ethernet controller (10 Mbps/100 Mbps transfer, IEEE802.3 PHY interface MII)
Ethernet AVB (IEEE802.1 Audio/Video Bridging) controller (requires nondisclosure agreement) -
SPI multi I/O bus controller × 2 channels
(up to 2 serial flash memory connectable to 1 channel, direct execution from CPU supported)
SPI multi I/O bus controller × 1 channel
(up to 2 serial flash memory connectable to 1 channel, direct execution from CPU supported)
Serial communication interface with 16-stage FIFO
(SCIF) × 8 channels
(asynchronous and clock synchronous serial communication possible)
Serial communication interface with 16-stage FIFO
(SCIF) × 5 channels
(asynchronous and clock synchronous serial communication possible)
Serial communication interface × 2 channels
(smart card interface, IrDA 1.0)
Renesas serial peripheral interface × 5 channels Renesas serial peripheral interface × 3 channels
I2C bus interface × 4 channels
Media Local Bus (MediaLB Ver2.0)
Controller area network (CAN) × 5 channels Controller area network (CAN) × 2 channels
Local interconnect network interface
(LIN) × 2 channels
Local interconnect network interface
(LIN) × 1 channels
System analog functions
Clock pulse generator (CPG): built-in PLL, maximum 32 times multiplication, built-in SSCG circuit
Direct memory access controller × 16 channels
Interrupt controller (with ARM Generic Interrupt Controller [PL390])
A/D converter (12-bit resolution) × 8 channels
Debugging interface
CoreSight™ architecture
JTAG standard pin layout
Optional function
Encryption engine (requires nondisclosure agreement)
Boot modes Boot mode 0: Boot from memory connected to CS0 space (16-bit bus)
Boot mode 1:
Boots from memory connected to CS0 space (32-bit bus)
Boot mode 1:
Boot from serial flash memory
Boot mode 2:
(not defined)
Boot mode 2:
Boot from built-in NAND flash memory of SD controller
Boot mode 3:
Boot from serial flash memory
Boot mode 3:
Boot from built-in NAND flash memory of MMC controller
Boot mode 4:
Boot from built-in NAND flash memory of SD controller
-
Boot mode 5:
Boot from built-in NAND flash memory of MMC controller
-
Power-down modes Sleep mode
Software standby mode
Deep standby mode
Module standby mode
*ARM, Cortex, CoreLink, and CoreSight are registered trademarks or trademarks of ARM Limited.
OpenVG is a trademark of the Khronos Group.
CAN (Controller Area Network): An automotive network specification developed by Robert Bosch GmbH of Germany.
LIN (Local Interconnect Network): An automotive network specification established by the LIN Consortium.
MediaLB (Media Local Bus): A registered trademark of SMSC, and an automotive network specification developed by SMSC.
IEBus™ (Inter Equipment Bus) is a trademark of Renesas Electronics Corporation.
All other names of products or services mentioned here are trademarks or registered trademarks of their respective owners.

 

Package

 

RZ/A1H




RZ/A1M

RZ/A1L

176p BGA
0.5mm pitch
8mmx8mm

(Industry usage etc.)

 

176p QFP
0.5mm pitch
24mmx24mm

(Car Accessory)

208p QFP
0.5mm pirch
28mmx28mm

(Car Accessory)

256p BGA
0.5mm pitch
11mmx11mm

(Industry usage etc.)

256p QFP
0.4mm pitch
28mmx28mm

(Car Accessory)

324p BGA
0.8mm pitch
19mmx19mm

(Car Accessory)


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