The RX621 Group is built around the RX core and is equipped with 2 channels (max) of USB 2.0 full-speed (Host, Function and OTG) and 1 channel of CAN as a communications interface. The products are designed to not put a restriction on applications based on their communication method; add-ons are used to achieve different communication methods. They are also equipped with a rich set of system fail-safe functions such as power-on reset (POR), low voltage detection (LVD), and an independent watchdog timer.
The RX62N Group is built around the RX core and is equipped with 1 channel of EtherC x 2 channels(max) of USB 2.0 Full-Speed (Host, Function and OTG) and 1 channel of CAN (optional) as a communications interface. The products are designed to not put a restriction on applications based on their communication method; add-ons are used to achieve different communication methods. They are also equipped with a rich set of system fail-safe functions such as power-on reset (POR), low voltage detection (LVD), and an independent watchdog timer.
Memory vs. Package Lineup
RX621 Group Block Diagram
RX621 Group Specifications
RX621 Group
CPU core
RX CPU
General registers: 32-bit x 16
Multiplier: 32-bit multiplier
Divider: Yes
Multiply-accumulator: Yes (two types: memory-to-memory operations and register-to-register operations)
Memory-protection unit (MPU)
Maximum operating frequency
100MHz
Power supply voltage
2.7 to 3.6V
Floating-point processing unit
Single-precision floating-point processing unit (Supports add/subtract/compare/multiply/divide and other instructions)
Flash ROM (for program storage)
Max. 512KB
Flash ROM (for data storage)
32KB
RAM
Max. 96KB
On-chip peripheral functions
Direct memory access controller (DMAC) x 4 channels
Data transfer controller (DTC)
Direct memory access controller designed exclusively (EXDMAC) x 2 channels (Over 144-pin PKG Only)
16-bit multifunction timer pulse unit (MTU2) x 12 channels
Port output enable
16-bit compare match timer x 4 channels
8-bit timer (TMR) x 4 channels
4-bit Programmable pulse generator (PPG) x 2 channels (max)
14-bit Independent watchdog timer (IWDT)
8-bit Watchdog timer (WDT)
Realtime clock (RTC)
Serial communication interface (SCI) x 6 channels
I2C bus interface:Except 100-pin [2 channels], 100-pin [1channel]
Serial peripheral interface (RSPI) x 2 channels
SDRAM interface (max. 32-bit width; Over 144-pin PKG Only)
A/D converter (10-bit) x 8 channels [4 channels x 2 units] or (12-bit) x 8 channels [8 channels x 1 unit] (12-bit and 10-bit can not use at the same time.)
A/D converter (10-bit) x 8 channels [4 channels x 2 units] or (12-bit) x 8 channels [8 channels x 1 unit] (12-bit and 10-bit can not use at the same time.)