RX600

RX CPU core: High-speed, high-performance, and high-code-efficiency

High speed: 100 MHz; high performance: 165 DMIPS@100 MHz (1.65 DMIPS/MHz) Built-in multiply-divide unit, multiply-and-accumulate unit, and single-precision floating point unit (FPU)

The RX CPU has achieved a maximum operating frequency up to 200 MHz. It is the next-generation CPU core that adopted high-speed features such as 5-stage pipeline, Harvard architecture, out-of-order execution, as well as multiply and accumulate unit, and FPU. With the RX610 Group, high processing performance of 1.65 DMIPS at 1 MHz (165 DMIPS at 100 MHz) has been achieved.

Low power consumption

Output current is about 50mA, even at the fastest-speed operation at 100 MHz. This translates to 0.5mA per 1 MHz, about half that of Renesas' existing products.
In addition, by optimizing the instruction length of frequently used instructions, an average 30% improvement in code efficiency over existing products is achieved.

Equipped with large-volume high-speed memory

The maximum memory capacity is 2 MB flash ROM with a 128 KB RAM. The 2 MB flash ROM is of high-speed MONOS (Metal Oxide Nitride Oxide Silicon) structure, no wait states at speeds up to 100 MHz. Combined with more than 30% improvement in code efficiency compared to Renesas’ existing products, it is highly useful for large-scale applications that require high-speed processing. In addition, a 128 KB SRAM and a data flash with 30,000 erase/write cycles are mounted to eliminate the need for external SRAM or EEPROM.

Enhanced built-in functions

In addition to enhanced standard functions such as serial communications and timer, the new products incorporate a variety of popular functions used in existing Renesas products, including DMAC (Direct Memory Access Controller) to perform high-speed data transfer in place of the CPU, DTC (Data Transfer Controller) to make data transfer efficient, and CMT (Compare Match Timer) useful for interrupt and polling.