M16C/6N4, M16C/6N5
The following page content corresponds to the products marketed in Japan.
If you do not live in Japan, please
- Overview
- Documentation
- Application Notes & Sample Code
- Software & Tools
- Design Support
- Further Information
- Product Specifications
M16C/6N4, M16C/6N5 Group Product Specifications
| Item | M16C/6N4 Group | M16C/6N5 Group | ||||
|---|---|---|---|---|---|---|
| Normal-ver. | T/V-ver. | Normal-ver. | T/V-ver. | |||
| CPU | Number of fundamental instructions | 91 instructions | ||||
| Minimum instruction execution time | 41.7 ns (f(BCLK) = 24 MHz,1/1 prescaler, without software wait) | 50.0 ns (f(BCLK) = 20 MHz, 1/1 prescaler, without software wait) | 41.7 ns (f(BCLK) = 24 MHz,1/1 prescaler, without software wait) | 50.0 ns (f(BCLK) = 20 MHz,1/1 prescaler, without software wait) | ||
| Operating mode | Single-chip, memory expansion, and microprocessor modes | |||||
| Address space | 1 Mbyte | |||||
| Memory capacity | ||||||
| Peripheral Function | Ports | Input/Output: 87 pins, Input: 1 pin | ||||
| Multifunction timers | Timer A: 16 bits ✕ 5 channels Timer B: 16 bits ✕ 6 channels Three-phase motor control circuit | |||||
| Serial interfaces |
| |||||
| A/D converter | 10-bit A/D converter: 1 circuit, 26 channels | |||||
| D/A converter | 8 bits ✕ 2 channels | |||||
| DMAC | 2 channels | |||||
| CRC calculation circuit | CRC-CCITT | |||||
| CAN module | 2 channels with 2.0B specification | 1 channel with 2.0B specification | ||||
| Watchdog timer | 15 bits ✕ 1 channel (with prescaler) | |||||
| Interrupts | Internal: 31 sources, External: 9 sources Software: 4 sources, Priority levels: 7 levels | Internal: 29 sources, External: 9 sources Software: 4 sources, Priority levels: 7 levels | ||||
| Clock generation circuits |
| |||||
| Oscillation-stopped detector | Main clock oscillation stop and re-oscillation detection function | |||||
| Electrical Characteristics | Supply voltage | VCC = 3.0 to 5.5 V (f(BCLK) = 24 MHz,1/1 prescaler, without software wait) | VCC = 4.2 to 5.5 V (f(BCLK) = 20 MHz,1/1 prescaler, without software wait) | VCC = 3.0 to 5.5 V (f(BCLK) = 24 MHz,1/1 prescaler, without software wait) | VCC = 4.2 to 5.5 V (f(BCLK) = 20 MHz,1/1 prescaler, without software wait) | |
| Consumption current | Mask ROM | 20 mA (f(BCLK) = 24 MHz,PLL operation, no division) | 18 mA (f(BCLK) = 20 MHz,PLL operation, no division) | 18 mA (f(BCLK) = 24 MHz,PLL operation, no division) | 16 mA (f(BCLK) = 20 MHz,PLL operation, no division) | |
| Flash memory | 22 mA (f(BCLK) = 24 MHz,PLL operation, no division) | 20 mA (f(BCLK) = 20 MHz,PLL operation, no division) | 20 mA (f(BCLK) = 24 MHz,PLL operation, no division) | 18 mA (f(BCLK) = 20 MHz,PLL operation, no division) | ||
| Mask ROM Flash memory | 3 μA (f(BCLK) = 32 kHz, Wait mode, Oscillation capacity Low) | |||||
| 0.8 μA (Stop mode, Topr = 25 degrees C) | ||||||
| Flash Memory Version | Programming and erasure voltage | 3.0 ± 0.3 V or 5.0 ± 0.5 V | 5.0±0.5V | 3.0 ± 0.3 V or 5.0 ± 0.5 V | 5.0±0.5V | |
| Programming and erasure endurance | 100 times | |||||
| I/O Characteristics | I/O withstand voltage | 5.0 V | ||||
| Output current | 5 mA | |||||
| Operating Ambient Temperature | -40 degrees C to 85 degrees C | T version: -40 to 85 degrees C V version: -40 to 125 degrees C (option)(1) | -40 degrees C to 85 degrees C | T version: -40 to 85 degrees C V version: -40 to 125 degrees C (option)(1) | ||
| Device Configuration CMOS high | CMOS high-performance silicon gate | |||||
| Package | 100-pin molded-plastic QFP, LQFP | |||||
Note:
- option: All options are on request basis.
Japan English
