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H8SX Family
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- Overview
- Documentation
- Design Support
- Software & Tools
- Further Information
Number of H8S/H8SX Multiplication Instruction Execution Cycles
| Operation | Number of Execution Cycles | |
| H8S | H8SX | |
| Unsigned Multiplication 16 bits x 16 bits ---> 32 bits 8 bits x 8 bits ---> 16 bits |
3 - 4 | 1 |
| Signed Multiplication 16 bits x 16 bits ---> 32 bits 8 bits x 8 bits ---> 16 bits |
4 - 5 | 2 |
| Unsigned Multiplication Rd x Rs ---> Rd (lower 32 bits/ lower 16 bits) |
- | 2 - 5 |
| Signed Multiplication Rd x Rs ---> Rd (lower 32 bits/ lower 16 bits) |
- | 2 - 5 |
| Unsigned Multiplication Rd x Rs ---> Rd (upper 32 bits) |
- | 6 |
| Signed Multiplication Rd x Rs ---> Rd (upper 32 bits) |
- | 6 |
Number of H8S/H8SX Division Instruction Execution Cycles
| Operation | Number of Execution Cycles | |
| H8S | H8SX | |
| Unsigned Division 16 bits / 8 bits ---> 8 bits with a remainder of 8 bits 32 bits / 16 bits ---> 16 bits with a remainder of 16 bits |
12 - 20 | 10 - 18 |
| Signed Division 16 bits / 8 bits ---> 8 bits with a remainder of 8 bits 32 bits / 16 bits ---> 16 bits with a remainder of 16 bits |
14 - 21 | 12 - 20 |
| Unsigned Division Rd/Rs ---> Rd (quotient of 16 bits/ a quotient of 32 bits) |
- | 10 - 18 |
| Signed Division Rd/Rs ---> Rd (quotient of 16 bits/ a quotient of 32 bits) |
- | 11 - 19 |
Configuration of General Registers
How to Use General Registers
H8SX VBR (Vector Base Register) Usage Example
H8SX SBR (Short Address Bace Register) Usage Example
1. Support for operations using memory
Additional instructions = basic operations (add-subtract/ logic) × basic
addressing
Example: Adjustment of long word data in memory
2. Improved addressing mode - for arrays
Example:Data from address d to address x is written to a register (word
data).
Bit field transfer (1)
*BFLD (Bit Field LoaD)
Example:The specified field where source operand is assigned is transferred to 8-bit register Rd from the lower bits. The bit field is specified by the bit which is set to 1 in the 8-bit immediate data.
Bit field transfer (2)
>BFST (Bit Field STore)
Contents of 8-bit register Rs are transferred to the field where the destination operand is specified. The bit field is specified by the bit which is set to 1 in the 8-bit immediate data.
