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- Overview
- Further Information
- Support for other on-chip buses
Rensas recognizes that there is not a universal market standard for on-chip interconnect and therefore the SuperH CPU cores have a bus-neutral interface that can be used with the SuperHyway Bus or another on-chip interconnect.
Licensees may wish to incorporate peripherals with interfaces designed to another bus or they may wish to use their own or another interconnect structure. SuperH addresses these requirements with the following options:
- Support for any on-chip interconnect or bus
- Since the SuperH CPU core has a bus neutral interface the licensee can interface the CPU core to any bus standard such as AMBA AHB and use this environment for the SoC development. In this case the SuperHyway is not required.
- Using peripherals with different interface standards
- In the case where the licensee wishes to implement an SoC with SuperHyway but use existing peripherals designed to interface to other buses then'bus bridges' can be employed, for example from the AMBA APB to SuperHyway. This is particularly suitable for interfacing a range of generic low speed or low bandwidth peripherals from multiple sources.