News Release
Key Features of Renesas Electronics' EMMA3TJ and EMMA3TS SoCs
Specifications common to both the EMMA3TJ and EMMA3TS SoCs
- OFDM channel decoder
- ISDB-T 13-segment OFDM channel decoder
- Support for IF (57 MHz), low IF (4 MHz)
- 8PSK channel decoder
- ISDB-S 8PSK demodulator
- Support for IQ input
- On-chip CPU specifications
- Main CPU
- MIPS32® 4KEc™ core
- 500 DMIPS at 320 MHz
- Sub-CPU
- MIPS32 4KEc core
- 500 DMIPS at 320 MHz
- Main CPU
- Memory interfaces
- DDR2 memory interface
- DDR2 800 MHz
- Support for max. 256 MB capacity
- Bus width: 16 bits
- NAND Flash ROM interface
- Support for max. 2 Gb capacity
- Support for 8-bit bus with
- DDR2 memory interface
- MPEG transport stream processing engine
- Stream input I/F
- Support for transport streams conforming to MPEG standard
- Video decoder
- Conforms to MPEG2 MP@HL
- MPEG4 AVC decoder HP@L4.0
- JPEG decoder
- Baseline support for decoding at 8,000 × 8,000 pixels
- Audio controller
- Support for MPEG1/MPEG2 layers 1/2, MP3
- Support for MPEG2 AAC, Dolby Digital, LPCM
- Support for SPDIF output
- Display and graphics
- 1 video plane
- 7 × 5 tap video scaler
- 2 OSD planes
- Peripheral functions
- USB 2.0 host controller × 1 line
- Ethernet controller × 1 line
- UART × 2 lines
- Smartcard I/F × 1
- I2C × 2 lines
- Clocked serial I/F
- IR receiver/blaster
- Timer
Specifications specific to the EMMA3TJ SoC
- Video input
- HDMI receiver × 1 line
- 3-channel video ADC on-chip
- Analog video decoder (NTSC/PAL)
- Audio input
- 4-channel audio ADC on-chip
- Panel output
- LVDS output I/F
Specifications specific to the EMMA3TS SoC
- Analog video outputs
- Composite analog video output/component analog video output
- 3-channel DAC on-chip for video output
The content in the press release, including, but not limited to, product prices and specifications, is based on the information as of the date indicated on the document, but may be subject to change without prior notice.
Japan English


