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Renesas Technology Releases 32-Bit SuperH™ Family SH7650 Offering Industry's First Single-Chip Implementation of DTCP-IP Content Protection Standard Compatible Functions
− On-chip Ethernet controller, enabling DTCP-IP standard compatible high
definition digital content network transfer with a single chip −
Tokyo, September 1, 2005 −− Renesas Technology
Corp. today announced the 32-bit SuperH*1 Family SH7650
microprocessor, incorporating the industry's first DTCP-IP (Digital
Transmission Content Protection over Internet Protocol)*2 content
protection standard compatible encryption/decryption functions and an Ethernet
controller, for use in digital audiovisual and office automation devices with
built-in network functions. Sample shipments will begin in November 2005 in
Japan.
The SH7650 offers the following features.
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(1)
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DTCP-IP support functions and Ethernet connection functions in a single-chip,
enabling secure network transfer of high definition digital content
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The SH7650 includes functions compliant with the DTCP-IP standard. An
inter-device authentication function and content encryption/decryption
function are implemented by hardware and also by firmware provided together
with the SH7650. An IEEE802.3 standard*3 compliant media
access controller (MAC)*4 is also incorporated, facilitating the
development of a 10/100 Mbps (megabit per second) Ethernet LAN connection
function. By this means it is possible to connect a user device to an
Ethernet, transfer digital content up to high definition resolution encrypted
in real time, and receive, decrypt, and use encrypted content, all with a
single SH7650 chip.
In addition, firmware performs DTCP-IP processing
automatically when content is transferred. This allows the user to treat such
transfers as normal data transfers without having to worry about DTCP-IP
processing, simplifying application development. This DTCP-IP related
functions and firmware have been produced by Renesas Technology using
technology developed by Hitachi, Ltd..
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(2)
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Comprehensive on-chip interface functions including PCI*5 bus
controller and host interface
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The SH7650 includes a PCI bus controller supporting the widely used PCI
standard. Existing inexpensive PC peripheral devices can be used via the PCI
bus, enabling system costs to be reduced. In addition, an on-chip host
interface (HIF) allows easy connection of the SH7650 to another
microprocessor. This function enables the SH7650 to be recognized and
controlled by a main microprocessor performing system control in the same way
as SRAM, allowing network related function development to be carried out
independently, and simplifying user product development.
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<Product Background>
More and more home
appliances are being connected to a home network. Connecting appliances in the
home to a home network makes it possible, for example, for a program recorded
on a DVD recorder in the living room to be transferred to and viewed on a DVD
recorder or TV set in another room. Among such digital audiovisual devices
appearing on the market are models equipped with an Ethernet connection
terminal as an Ethernet function, and this trend is expected to increase in
the future.
At the same time, it is essential for
authentication and encryption processing to be carried out between devices
when transferring copyright protected digital content via a network in order
to protect content on the network from unauthorized access.
For this market, Renesas Technology has developed the SH7650 32-bit SuperH
Family microprocessor incorporating DTCP-IP content protection standard
compatible functions and an Ethernet controller.
<Product Details>
The SH7650 incorporates a 32-bit
SH-2 CPU core. With processing power of 173 MIPS (million instructions per
second) at a maximum operating frequency of 133 MHz, the SH7650 is ideal for
use in devices equipped with DTCP-IP content protection standard compatibility
and network functions.
DTCP-IP compatible functions provided
in the SH7650 comprise a hardware encryption circuit block, and firmware for
encryption circuit block and content data transfer control.
Copyright protected digital content transferred via a network must be
protected from unauthorized access by means of mutual authentication between
devices and content encryption, and it is also necessary for encrypted content
to be similarly protected from unauthorized access within the device. The
SH7650 includes three MPEG-TS port channels for moving image streaming
enabling high-speed transfer of MPEG-2*6 TS (Transport Stream)
format data. These ports can be connected to an MPEG-2 encoder/decoder chip,
enabling encrypted data received via a network to be decrypted, and
transferred to an MPEG-2 chip at high speed as MPEG-2 TS format moving image
data. Also, performing high-speed encryption of content data by means of the
on-chip encryption circuit before transmission via a network makes it possible
to achieve secure network transfer of digital content including high
definition data.
Thus, DTCP-IP support functions are
implemented by means of a hardware encryption circuit block and moving image
streaming ports, together with firmware (software), as described above.
Having processing performed automatically by firmware makes it unnecessary for
the user to directly control DTCP-IP support functions, and enables DTCP-IP
compatible content transfer to be performed in the same way as normal network
transfer. This firmware is provided together with the SH7650 as a set.
The SH7650 also includes a comprehensive range of peripheral functions.
A single-channel Ethernet controller is provided that facilitates connection
to a 10/100 Mbps Ethernet LAN. This Ethernet controller incorporates an
IEEE802.3 compliant MAC layer, and an accelerator that performs TCP/IP
checksum computations automatically without software intervention, reducing
the load on the CPU.
A PCI bus controller is included as an
interface to external devices. This allows easy connection to a platform for
the PCI bus, which is widely used in home electrical appliances, PCs, office
automation equipment, and so forth. An on-chip host interface is also
provided, facilitating connection to a main microprocessor for system control
or the like. This interface allows recognition of the SH7650 by a main
microprocessor as an SRAM-equivalent device, enabling data downloaded via a
network to be transferred to the main microprocessor at high speed.
Use of these external interface functions not only allows network connection
functions to be developed in parallel with basic user system functions,
enabling development time to be shortened, but also facilitates functional
upgrading of an existing system through the addition of an Ethernet connection
function.
The package used is a 336-pin CSP (17 mm x 17 mm).
On-chip debugging functions are provided, enabling real-time debugging to be
carried out at the maximum operating frequency. The small, PC card sized
E10A-USB can be used as an emulator.
Renesas Technology will
continue to extend its lineup of products with an on-chip Ethernet controller,
including the provision of models offering faster CPU performance, wireless
LAN support, and enhanced peripheral functions.
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Notes:
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1.
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SuperH is a trademark of Renesas Technology Corp.
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2.
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DTCP-IP standard: A standard for IP network content protection, standardized
by the DTLA (Digital Transmission Licensing Administrator)
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3.
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IEEE802.3: IEEE802 is the title of an IEEE (Institute of Electrical and
Electronics Engineers) committee for promoting LAN standardization. IEEE802.3
is a CSMA/CD 10/100 Mbps Ethernet LAN specification standard. In CSMA/CD
(Carrier Sense Multiple Access with Collision Detection), the presence of a
carrier is detected before transmission, and if a collision is detected during
transmission, the system waits for a predetermined time before restarting
transmission.
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4.
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MAC (Media Access Control) : A lower sub-layer within the data link layer,
stipulating the frame transmission/reception method, frame format, data error
detection, etc.
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5.
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PCI (Peripheral Component Interconnect) : A bus specification standardized by
the PCI Special Interest Group
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6.
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MPEG-2 (Moving Picture Experts Group phase 2) : A video data compression
method comprising part of the MPEG standard
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* Other product names, company names, or brands mentioned are the property of
their respective owners.
<Typical
Applications>
The following devices equipped with a
network connection function :
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Digital audiovisual devices: DVD recorders, flat-panel TVs, audio systems, etc.
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Office automation equipment: Printers, etc.
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<Prices in Japan> *For Reference
Product Name
(Type Name)
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Maximum Operating Frequency
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Package
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Sample Price
[Tax Included] (Yen)
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SH7650
(R4S76500B133BG)
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133 MHz
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336-pin CSP
(17 mm x 17 mm)
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2,500 [2,625]
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<Important Note>
A license must be obtained from the
DTLA (Digital Transmission Licensing Administrator) when purchasing this
product.
<Specifications>
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Item
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SH7650 Specifications
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Type name
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R4S76500B133BG
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Power supply voltage
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1.5 V (internal) / 3.3 V (external)
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Maximum operating frequency
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133 MHz
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Maximum processing performance
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173 MIPS (at 133 MHz operation)
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CPU core
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SH-2
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On-chip RAM
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8 Kbytes
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Cache memory
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16 Kbytes (mixed instructions/data, 4-way set associative type)
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External bus interfaces
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SH local bus controller
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SRAM, SDRAM, ROM directly connectable, or PCMCIA interface used
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Data bus width: External 8/16/32 bits
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PCI bus controller
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External PCI device connectable with 32-bit bus width
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33 MHz operation possible
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Host interface function
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16-bit bus width SRAM type nterface
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Incorporating 1 Kbyte ｘ 2 bank buffer RAM
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On-chip peripheral functions
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DTCP-IP support functions
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Encryption module
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Dedicated DMA controller with built-in descriptor function
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Moving image stream MPEG-TS port x 3 channels
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Ethernet controller x 1 channel
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Dedicated Ethernet controller DMAC x 2 channels
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TCP/IP checksum accelerator
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General-purpose DMA controller x 4 channels
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Host interface function (1 Kbyte x 2 banks)
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Serial communication interface with FIFO (SCIF) x 2 channels (asynchronous and
synchronous serial communication capability)
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16-bit compare match timer (CMT) x 2 channels
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On-chip debugging functions
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Interrupt controller (INTC)
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Watchdog timer (WDT)
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Clock pulse generator (CPG): Built-in multiplication PLL
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Power-down modes
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Sleep mode
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Software standby mode
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Module standby mode
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Package
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336-pin CSP (17 mm x 17 mm)
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Information contained in this news release is current as of the date of the
press announcement, but may be subject to change without prior notice.
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