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General-Purpose Microprocessor Equipped With Renesas' Original AI Accelerator "DRP-AI", 1.2GHz Dual-Core Arm Cortex-A55 CPU, 3D Graphics, and Video Codec Engine

Package Information

CAD Model:View CAD Model
Pkg. Type:LFBGA
Pkg. Code:pkg_20050
Lead Count (#):456
Pkg. Dimensions (mm):15 x 15 x 1.4
Pitch (mm):0.5

Environmental & Export Classifications

Moisture Sensitivity Level (MSL)3
ECCN (US)3A991.a.2
HTS (US)8542.31.0050
RoHS (R9A07G054L27GBG#BC0)EnglishJapanese
Pb (Lead) FreeYes

Product Attributes

Carrier TypeFull Carton (Tray)
Family NameRZ
Series NameRZ/V
Group NameV2L
CPU ArchitectureArm
Main CPUCortex-A55 x 2 + Cortex-M33 x 1
Sub CPUCortex-M33
Floating Point UnitDouble/Single/Half
Bit Length64
Program Memory (KB)0
Data Flash (KB)0
RAM (KB)128
ECC SRAMYes
Lead Count (#)456
Pitch (mm)0.5
Pkg. Dimensions (mm)15 x 15 x 1.4
Number of Supply Voltage(s) (#)5
Supply Voltage (V)2.97 - 3.63
I/O Ports123
DMAC or DTCDMAC
DMA (ch)16
Temperature Sensor (ch) (#)1
Power-On ResetNo
Watchdog Timer (ch)3
External Memory Bus (bit)16
DRAM I/FDDR3L-1333, DDR4-1600 (16-bit)
NPUYes
3D GPUArm Mali-G31
AcceleratorDRP-AI
MOQ952
Temp. Range (°C)Tj = -40 to +125
External Interrupt Pins (#)8
LVD or PVDNo
Operating Freq (Max) (MHz)1200
Operating Freq of Sub CPU (Max)200
Sub-clock (32.768 kHz)No
On-chip OscillatorNo
Ethernet speed10M/100M/1G
Ethernet (ch)2
EtherCat (ch) (#)0
USB Ports (#)2
USB FS (host ch/device ch)( 2 / 1 )
USB HS (host ch/device ch)( 2 / 1 )
USB SS (host ch/device ch)( 0 / 0 )
PCI Express (generation and ch)No
SCI or UART (ch)2
SPI (ch)3
QSPI (ch)0
OSPI (ch)1
I2C (#)4
I3C (ch)0
CAN (ch)0
CAN-FD (ch)2
WirelessNo
IrDANo
LIN (#)0
SDHI (ch)2
High Resolution Output TimerNo
PWM Output (pin#)0
32-Bit Timer (ch)1
16-Bit Timer (ch) (#)8
8-Bit Timer (ch)0
Standby operable timerNo
Asynchronous General Purpose Timer / Interval Timer (ch)0
RTCNo
16-Bit A/D Converter (ch)0
14-Bit A/D Converter (ch)0
12-Bit A/D Converter (ch)8
10-Bit A/D Converter (ch)0
24-Bit Sigma-Delta A/D Converter (ch)0
16-Bit D/A Converter (ch)0
12-Bit D/A Converter (ch)0
10-Bit D/A Converter (ch) (#)0
8-Bit D/A Converter (ch)0
Analog Comparator (ch)0
OPAMP (ch) (#)0
PGA (ch)0
Capacitive Touch Sensing Unit (ch)0
Graphics LCD ControllerNo
MIPI Interfaces (DSI) (ch)1
MIPI Interfaces (CSI) (ch)1
Camera I/F (Parallel)No
Image CodecH.264 enc/dec
2D Drawing EngineNo
Segment LCD ControllerNo
SSI (ch)4
Security & EncryptionAES,RSA,ECC,SHA-1,SHA-224,SHA-256,GHASH,TRNG
Debug InterfaceJTAG/SWD
Moisture Sensitivity Level (MSL)3
Country of AssemblyTAIWAN
Country of Wafer FabricationKOREA
12-Bit Timer (ch)0
32-Bit High Res Timer (ch)0
ADC12-bit x 8-ch
Asynchronous General Purpose Timer (ch)0
Bit Size64
CPUCortex-A55 x 2 + Cortex-M33 x 1
DMAYes
DTC (ch)0
Delta-Sigma A/D ConverterNo
Ethernet10/100M/1G x 2 ch
Family NameRZ
Group NameV2L
High-Speed Analog Comparator (ch)0
Human Machine InterfaceDisplay Function, Video In
Lead CompliantYes
Length (mm)15
Longevity2037 Jul
Low-Power Analog Comparator (ch)0
MIPI Interfaces (DSI/CSI)DSI/CSI-2
Pb (Lead) FreeYes
Pkg. TypeLFBGA
Price (USD)$19.29773
Suggested KitsRZ/V2L-EVKIT
Tape & ReelNo
Thickness (mm)1.4
Timer16-bit x 8-ch, 32-bit x 2-ch, 32-bit x 8-ch
USBUSB2.0 x 2 ch (1H. 1H/F/OTG)
USBFS (ch)1
USBHS (ch)1
Width (mm)15

Description

RZ/V2L is equipped with an Arm® Cortex®-A55 (1.2GHz) CPU and built-in AI accelerator "DRP-AI" for vision, which is Renesas' original technology. "DRP-AI" is configured with DRP and AI-MAC. It also has a 16-bit DDR3L/DDR4 interface and a built-in 3D graphics engine with Arm Mali-G31 and video codec (H.264).

DRP-AI’s excellent power efficiency eliminates the need for heat dissipation measures such as heat sinks or cooling fans. AI can be implemented cost efficiently not only in consumer electronics and industrial equipment but also in a wide range of applications such as point-of-sale (POS) terminals for retail. Also, the DRP-AI provides both real-time AI inference and image processing functions with the capabilities essential for camera support such as color correction and noise reduction. This enables customers to implement AI-based vision applications without requiring an external image signal processor (ISP).

The RZ/V2L is also package- and pin-compatible with the RZ/G2L. This allows RZ/G2L users to easily upgrade to the RZ/V2L for additional AI functions without needing to modify the system configuration, keeping migration costs low.