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High Performance 32-bit Microcontrollers Achieving 5.06CoreMark/MHz (607CoreMark) with RXv2 Core Employed

Package Information

CAD Model:View CAD Model
Pkg. Type:TFLGA
Pkg. Code:pkg_1723
Lead Count (#):100
Pkg. Dimensions (mm):7 x 7 x 1.05
Pitch (mm):0.65

Environmental & Export Classifications

Moisture Sensitivity Level (MSL)3
ECCN (US)3A991.a.2
HTS (US)8542.31.0025
RoHS (R5F564MGHDLJ#21)EnglishJapanese
Pb (Lead) FreeYes

Product Attributes

Carrier TypeTray
Family NameRX
Series NameRX600
Group NameRX64M
CPU ArchitectureRX
Main CPURXv2
Sub CPUNo
Floating Point UnitSingle
Bit Length32
Program Memory (KB)2560
Data Flash (KB)64
RAM (KB)512
ECC SRAMNo
Lead Count (#)100
Pitch (mm)0.65
Pkg. Dimensions (mm)7 x 7 x 1.05
Number of Supply Voltage(s) (#)1
Supply Voltage (V)2.7 - 3.6
I/O Ports79
DMAC or DTCDMAC&DTC
DMA (ch)8
Temperature Sensor (ch) (#)1
Power-On ResetYes
Watchdog Timer (ch)2
External Memory Bus (bit)8,16
DRAM I/FNo
3D GPUNo
AcceleratorNo
MOQ1
Temp. Range (°C)Ta = -40 to +85
External Interrupt Pins (#)16
LVD or PVDYes
Operating Freq (Max) (MHz)120
Sub-clock (32.768 kHz)Yes
On-chip OscillatorYes
Ethernet speed10M/100M
Ethernet (ch)1
EtherCat (ch) (#)0
USB Ports (#)1
USB FS (host ch/device ch)( 1 / 1 )
USB HS (host ch/device ch)( 0 / 0 )
USB SS (host ch/device ch)( 0 / 0 )
PCI Express (generation and ch)No
SCI or UART (ch)9
SPI (ch)8
QSPI (ch)1
OSPI (ch)0
I2C (#)9
I3C (ch)0
CAN (ch)2
CAN-FD (ch)0
WirelessNo
IrDANo
LIN (#)0
SDHI (ch)1
High Resolution Output TimerNo
PWM Output (pin#)47
32-Bit Timer (ch)3
16-Bit Timer (ch) (#)22
8-Bit Timer (ch)4
Standby operable timerNo
Asynchronous General Purpose Timer / Interval Timer (ch)0
RTCYes
16-Bit A/D Converter (ch)0
14-Bit A/D Converter (ch)0
12-Bit A/D Converter (ch)22
10-Bit A/D Converter (ch)0
24-Bit Sigma-Delta A/D Converter (ch)0
16-Bit D/A Converter (ch)0
12-Bit D/A Converter (ch)1
10-Bit D/A Converter (ch) (#)0
8-Bit D/A Converter (ch)0
Analog Comparator (ch)0
OPAMP (ch) (#)0
PGA (ch)0
Capacitive Touch Sensing Unit (ch)0
Graphics LCD ControllerNo
MIPI Interfaces (DSI) (ch)0
MIPI Interfaces (CSI) (ch)0
Camera I/F (Parallel)No
Image CodecNo
2D Drawing EngineNo
Segment LCD ControllerNo
SSI (ch)2
Security & EncryptionUnique ID, AES, DES, 3DES, SHA-1, SHA224/SHA256, TRNG
Debug InterfaceJTAG/Single-wire Serial
Moisture Sensitivity Level (MSL)3
Country of AssemblyJAPAN
Country of Wafer FabricationJAPAN
12-Bit Timer (ch)0
32-Bit High Res Timer (ch)0
ADC12-bit x 22-ch
Asynchronous General Purpose Timer (ch)0
Bit Size32
CPURXv2
DAC12-bit x 1-ch
DMAYes
DTC (ch)0
Delta-Sigma A/D ConverterNo
EthernetYes
Family NameRX
Group NameRX64M
High-Speed Analog Comparator (ch)0
Human Machine InterfaceSerial sound interface
Lead CompliantYes
Length (mm)7
Longevity1999 Jan
Low-Power Analog Comparator (ch)0
Pb (Lead) FreeYes
Pkg. TypeTFLGA
Price (USD)$10.9
SPI (#)8
Tape & ReelNo
Thickness (mm)1.05
Timer8-bit x 4-ch, 16-bit x 22-ch, 32-bit x 3-ch
UART (#)9
USBUSB Host||USB Peripheral||USB Ports (ch) x 1||USB Endpoints x 10||USB Isochronous Transfer Support
USBFS (ch)0
USBHS (ch)0
Width (mm)7

Description

The RX64M Group 32-bit microcontrollers are capable of operating at up to 120 MHz, providing a leading edge performance of 5.06 CoreMark/MHz. The RX64M employs the powerfully evolved RXv2 core, which is backward compatible with the RX core employed in existing RX products.The RXv2 core enables 1.48 times the CoreMark/MHz performance and a 40% reduction in power consumption compared to existing RX products, and even higher code efficiency, allowing the realization of high-speed, low consumption systems. The RX64M Group is equipped with large-capacity memory of up to 4 MB of ROM for code and 552 KB work RAM. Built-in functions include the well-received event link controller from the RX200 and abundant functions from the RX63N, as well as SD card and audio interfaces, which are highly demanded by the market, and IEEE 1588 industrial Ethernet functions have been added. Thus, the RX64M Group is suitable for industrial equipment, network devices, and other applications requiring advanced real-time performance and large-capacity memory. We are also preparing a variety of middleware to support short system development times at low cost.