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Package Information
| CAD Model: | View CAD Model |
| Pkg. Type: | QFN |
| Pkg. Code: | L5A |
| Lead Count (#): | 14 |
| Pkg. Dimensions (mm): | 3.0 x 3.0 x 0.75 |
| Pitch (mm): | 0.5 |
Environmental & Export Classifications
| Moisture Sensitivity Level (MSL) | 1 |
| Pb (Lead) Free | Yes |
| HTS (US) | 8542.39.0090 |
| ECCN (US) |
Product Attributes
| Protection Features | Anti-Shoot-Through Protection |
| Lead Count (#) | 14 |
| Carrier Type | Reel |
| Moisture Sensitivity Level (MSL) | 1 |
| Pitch (mm) | 0.5 |
| Pkg. Dimensions (mm) | 3.0 x 3.0 x 0.75 |
| Pb (Lead) Free | Yes |
| Pb Free Category | Pb-Free 100% Matte Tin Plate w/Anneal-e3 |
| Temp. Range (°C) | -40 to +125°C |
| Bootstrap Supply Voltage (Max) (V) | 104 |
| Charge Pump | No |
| Fall Time | 2.7ns |
| Input Logic Level | 3.3/5V CMOS |
| Length (mm) | 3 |
| MOQ | 6000 |
| Peak Pull-down Current (A) | 5.3 |
| Peak Pull-up Current (A) | 2 |
| Pkg. Type | QFN |
| Price (USD) | $0.95 |
| Qualification Level | standard |
| Rise Time (μs) | 4.5 |
| Simulation Model Available | isim |
| Thickness (mm) | 0.75 |
| Turn-Off Prop Delay (ns) | 17 |
| Turn-On Prop Delay (ns) | 19 |
| VBIAS (Max) (V) | 5.5 |
| Width (mm) | 3 |
Resources for RRP68150
Description
The RRP68150 is a 5V‑powered, high‑frequency half‑bridge driver optimized for enhancement‑mode GaN FETs and low‑threshold N‑channel MOSFETs. It delivers 2A source and 5.3A sink current capability, supporting a switching node up to 100V DC. The driver’s PWM inputs are compatible with 3.3V/5V CMOS logic and can tolerate up to 14V, independent of the VDD supply. The high‑side bias voltage uses a bootstrap technique and is internally clamped at 5.4V to prevent exceeding the GaN FET’s maximum gate‑source rating. A 5V operational supply simplifies power sharing with the controller.
As part of the RRP6815x driver family, the RRP68150 maintains consistent design and performance across related products. It integrates anti‑shoot‑through protection, which safeguards operation by preventing simultaneous conduction of the high‑side and low‑side FETs.