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Renesas Electronics Corporation

Renesas’ Timing product portfolio has been acquired by SiTime.

Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.

FemtoClock 2 Jitter Attenuator or Clock Generator
This device is factory-configurable.
Try the Custom Part Configuration Utility.

Package Information

CAD Model:View CAD Model
Pkg. Type:VFQFPN
Pkg. Code:NXG28
Lead Count (#):28
Pkg. Dimensions (mm):4.0 x 4.0 x 1.5
Pitch (mm):0.4

Environmental & Export Classifications

Moisture Sensitivity Level (MSL)3
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

Product Attributes

Lead Count (#)28
Carrier TypeTray
Moisture Sensitivity Level (MSL)3
Qty. per Reel (#)0
Qty. per Carrier (#)490
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)-40 to 85°C
105°C Max. Case Temp.0
Advanced FeaturesSyncE, DCO, Phase Adjust, External Feedback, Hitless Switching
App Jitter Compliance112G SerDes Jitter, PCIe Gen 6
ApplicationSwitch, Router, Medical Equipment, Broadcasting Video
Channels (#)1
Clock SupportT-TSC, G.8262, G.8262.1
Core Voltage (V)1.8V, 3.3V
Diff. Inputs1
Diff. Outputs4
Family NameFemtoClock Clock Generator
Feedback Divider1 - 255
Feedback InputNo
Fractional Output Dividers (#)1
Input Freq (MHz)1 - 800
Input TypeCrystal, LVPECL, HCSL, LVDS, CML, LVCMOS
Inputs (#)3
Length (mm)4
Longevity2040 Apr
Loop Bandwidth Range (Hz)0.1 - 12000
MOQ490
Output Banks (#)4
Output Freq Range (MHz)10 - 1000
Output SignalingLVPECL, LVDS
Output Skew (ps)40
Output TypeHCSL, LVDS, LVCMOS
Output Voltage (V)1.8
Outputs (#)4
Package Area (mm²)81
Phase Jitter Max RMS (ps)0.1
Phase Jitter Typ RMS (fs)79
Phase Jitter Typ RMS (ps)0.079
Pitch (mm)0.4
Pkg. Dimensions (mm)4.0 x 4.0 x 1.5
Pkg. TypeVFQFPN
Product CategoryFemtoClock 2, Ultra-Low Jitter Clocks (<300 fs RMS), Extreme Performance Clocks (<150 fs RMS), Jitter Attenuators, Network Synchronization, PDH and SONET/SDH Clocks, Programmable Clocks
Prog. ClockYes
Prog. InterfaceOTP, I2C, SPI
Reference OutputNo
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Selection Criteria<150 fs RM
Spread SpectrumNo
Tape & ReelNo
Thickness (mm)1.5
Width (mm)4
Xtal Freq (KHz)25 - 80
Xtal Inputs (#)1

Description

The RC32514A is a small, low-power timing component designed to be placed immediately adjacent to a PHY, switch, ASIC, or FPGA that requires several reference clocks with a jitter performance of less than 100fs. The RC32514A can act as a frequency synthesizer to locally generate the reference clock, a jitter attenuator to perform local clean-up, and/or frequency translation of a centrally-supplied reference, a synchronous Ethernet equipment clock to perform passband filtering and clean-up of network-supplied references or as a digitally controlled oscillator (DCO) for frequency margining or OTN clock applications. It contains an internal crystal that can be leveraged as the frequency reference for the onboard PLL if desired.