Renesas’ Timing product portfolio has been acquired by SiTime.
Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.
| CAD Model: | View CAD Model |
| Pkg. Type: | VFQFPN |
| Pkg. Code: | NLG72 |
| Lead Count (#): | 72 |
| Pkg. Dimensions (mm): | 10.0 x 10.0 x 1.0 |
| Pitch (mm): | 0.5 |
| Moisture Sensitivity Level (MSL) | 3 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
| Lead Count (#) | 72 |
| Carrier Type | Tray |
| Moisture Sensitivity Level (MSL) | 3 |
| Qty. per Reel (#) | 0 |
| Qty. per Carrier (#) | 168 |
| Pkg. Dimensions (mm) | 10.0 x 10.0 x 1.0 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | -40 to 105°C |
| Assembly Location | TAIWAN |
| Wafer Fab Location | TAIWAN |
| Adjustable Phase | No |
| Advanced Features | Flexible Power Sequencing, Loss of Signal Indicator, Power Down Tolerant, Automatic Clock Parking, SMBus Write Protection |
| App Jitter Compliance | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, PCIe Gen5, PCIe Gen6, PCIe Gen7 |
| Architecture | Common, SRIS, SRNS |
| Channels (#) | 2 |
| Core Voltage (V) | 3.3 |
| Diff. Inputs | 1 |
| Diff. Output Signaling | LP-HCSL |
| Diff. Outputs | 20 |
| Family Name | RC19 |
| Function | Fanout Buffer |
| Input Freq (MHz) | 1 - 400 |
| Input Type | LVDS, HCSL |
| Inputs (#) | 1 |
| Length (mm) | 10 |
| Longevity | 2040 Apr |
| MOQ | 168 |
| Noise Floor (dBc/Hz) | -154 |
| Output Banks (#) | 1 |
| Output Enable (OE) Pins | -154 |
| Output Freq Range (MHz) | 1 - 400 |
| Output Impedance | 85 |
| Output Type | LP-HCSL |
| Output Voltage (V) | 0.8 |
| Outputs (#) | 20 |
| Pitch (mm) | 0.5 |
| Pkg. Type | VFQFPN |
| Product Category | Clock Buffers & Drivers, PCI Express Clocks |
| Prog. Interface | SMBus, Side-Band |
| Supply Voltage (V) | 3.3 - 3.3 |
| Tape & Reel | No |
| Thickness (mm) | 1 |
| Width (mm) | 10 |
The RC19020 is a 20-output PCIe Gen7 buffer that is backward compatible with earlier PCIe generations. The RC19020 provides ultra-low additive jitter and reduced in-to-out delay performance for better design margin and incorporates several features for easier and more robust design.
RC19020 is also pin-compatible to DB2000Q/DB2000QL plus adding Loss-Of-Signal (LOS) indication and an SBI_OUT pin for multiple clock chip daisy-chain.