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Renesas’ Timing product portfolio has been acquired by SiTime.

Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.

MK2059-01 - Block Diagram
MK2059-01 - Pinout
3D illustration featuring top and bottom views of SOIC chip package with 20 lead count.
MK2059-01 - Block Diagram
MK2059-01 - Pinout
3D illustration featuring top and bottom views of SOIC chip package with 20 lead count.

MK2059-01SILF

Obsolete
VCXO-Based Frame Clock Frequency Translator
MK2059-01 DatasheetLearn more about MK2059-01

Package Information

CAD Model:View CAD Model
Pkg. Type:SOIC
Pkg. Code:PSG20
Lead Count (#):20
Pkg. Dimensions (mm):12.8 x 7.6 x 2.34
Pitch (mm):1.27

Environmental & Export Classifications

Moisture Sensitivity Level (MSL)1
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

Product Attributes

Lead Count (#)20
Carrier TypeTube
Moisture Sensitivity Level (MSL)1
Qty. per Reel (#)0
Qty. per Carrier (#)37
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)-40 to 85°C
Abs. Pull Range Min. (± PPM)115
C-C Jitter Typ P-P (ps)150
Core Voltage (V)3.3
Feedback InputNo
Input Freq (MHz)0.008 - 0.008
Input TypeLVCMOS
Inputs (#)2
Length (mm)12.8
MOQ74
Output Banks (#)1
Output Freq Range (MHz)1.544 - 25.92
Output TypeLVCMOS
Output Voltage (V)3.3
Outputs (#)1
Package Area (mm²)97.3
Phase Jitter Typ RMS (ps)170
Pitch (mm)1.27
Pkg. Dimensions (mm)12.8 x 7.6 x 2.34
Pkg. TypeSOIC
Product CategoryJitter Attenuators
Prog. ClockNo
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelNo
Thickness (mm)2.34
Width (mm)7.6

Description

The MK2059-01 is a VCXO (Voltage Controlled Crystal Oscillator) based clock generator that produces common telecommunications reference frequencies. The output clock is phase locked to an 8kHz (frame rate) input reference clock. The MK2059-01 also provides jitter attenuation. Included in the selection of output frequencies are these common system clocks: 1.544 MHz (T1) 2.048 (E1) 19.44 MHz (OC-3) 16.384 MHz (8x E1) This monolithic IC, combined with an external inexpensive quartz crystal, can be used to replace a more costly hybrid VCXO retiming module. Through selection of external loop filter components, the PLL loop bandwidth and damping factor can be tailored to meet input clock jitter attenuation requirements. A loop bandwidth down to the Hz range is possible

Learn more about MK2059-01