| Pkg. Type: | CLCC |
| Pkg. Code: | CG36 |
| Lead Count (#): | 36 |
| Pkg. Dimensions (mm): | 9.0 x 9.0 x 2.8 |
| Pitch (mm): | 0.6 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
| Moisture Sensitivity Level (MSL) | 1 |
| Pkg. Type | CLCC |
| Lead Count (#) | 36 |
| Pb (Lead) Free | Yes |
| Carrier Type | Reel |
| Common Input Freq (MHz) | 622.08MHz, 666.51MHz, 669.33MHz, 672.16MHz |
| Core Voltage (V) | 3.3 |
| Diff. Input Signaling | 3.3 |
| Diff. Output Signaling | 3.3 |
| Divider Value | 1, 4 |
| Feedback Divider | 1 - 1, 2 - 2, 4 - 4, 8 - 8, 14 - 14, 15 - 15, 32 - 32, 79 - 79, 85 - 85, 236 - 236, 239 - 239, 255 - 255 |
| Function | FEC Translation Clock PLL, Jitter Attenuation |
| I/O Voltage (V) | 3.3 - 3.3 |
| Input Freq (MHz) | 10 - 700 |
| Input Type | LVPECL |
| Inputs (#) | 2 |
| Length (mm) | 9 |
| M/R Look-Up Table | Yes |
| MOQ | 500 |
| Moisture Sensitivity Level (MSL) | 1 |
| Operating Freq | 622.08 |
| Output Banks (#) | 2 |
| Output Freq Range (MHz) | 100 - 700 |
| Output Signaling | LVPECL |
| Output Type | LVPECL |
| Output Voltage (V) | 3.3 |
| Outputs (#) | 2 |
| Package Area (mm²) | 81 |
| Pb Free Category | e4 Au |
| Phase Jitter Max RMS (ps) | 0.5 |
| Phase Jitter Typ RMS (ps) | 0.25 |
| Pitch (mm) | 0.6 |
| Pkg. Dimensions (mm) | 9.0 x 9.0 x 2.8 |
| Published | No |
| Qty. per Carrier (#) | 0 |
| Qty. per Reel (#) | 500 |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Supply Voltage (V) | 3.3 - 3.3 |
| Tape & Reel | Yes |
| Temp. Range (°C) | 0 to 70°C |
| Thickness (mm) | 2.8 |
| Width (mm) | 9 |
The M2006-02A is a VCSO (Voltage Controlled SAW Oscillator) based clock generator PLL designed for clock frequency translation and jitter attenuation. The device supports both forward and inverse FEC (Forward Error Correction) clock multiplication ratios. Multiplication ratios are pin-selected from pre-programming look-up tables.