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Renesas Electronics Corporation
ZVS Full-Bridge Current-Mode PWM with Adjustable Synchronous Rectifier Control

Package Information

CAD Model:View CAD Model
Pkg. Type:QSOP
Pkg. Code:MLK
Lead Count (#):16
Pkg. Dimensions (mm):4.9 x 3.9 x 1.47
Pitch (mm):0.6

Environmental & Export Classifications

Moisture Sensitivity Level (MSL)2
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090
RoHS (ISL6752AAZA-T)Download

Product Attributes

Pkg. TypeQSOP
Lead Count (#)16
Carrier TypeReel
Moisture Sensitivity Level (MSL)2
Pb (Lead) FreeYes
Pb Free CategoryPb-Free 100% Matte Tin Plate w/Anneal-e3
Temp. Range (°C)-40 to +105°C
Control ModePeak Current Mode
Duty Cycle (%)99 - 99
FET Driver Output Current (Max) (A)0.01
Length (mm)4.9
MOQ2500
No-Load Operating Current11 mA (typ), 15.5 mA (max)
PWMs (#)6
Parametric CategoryZero Voltage Switching (ZVS) Full Bridge Controllers
Pitch (mm)0.6
Pkg. Dimensions (mm)4.9 x 3.9 x 1.47
Qualification LevelStandard
Switching Frequency (KHz)2000 - 2000
Thickness (mm)1.47
Topology CharacteristicFull-Bridge ZVS
Topology [Rail 1]Zero-Voltage-Switching (ZVS)
UVLO Falling (V)7
UVLO Rising (V)8.75
VBIAS (Max) (V)20
Width (mm)3.9

Description

The ISL6752 is a high-performance, low-pin count alternative Zero-Voltage Switching (ZVS) full-bridge PWM controller. Like Renesas' ISL6551, it achieves ZVS operation by driving the upper bridge FETs at a fixed 50% duty cycle while the lower bridge FETs are trailing-edge modulated with adjustable resonant switching delays. Compared to the more familiar phase-shifted control method, this algorithm offers equivalent efficiency and improved overcurrent and light load performance with less complexity in a lower pin count package. The ISL6752 features complemented PWM outputs for Synchronous Rectifier (SR) control. The complemented outputs may be dynamically advanced or delayed relative to the PWM outputs using an external control voltage. This advanced BiCMOS design features precision dead time and resonant delay control and an oscillator adjustable to 2MHz operating frequency. Additionally, multi-pulse suppression ensures alternating output pulses at low duty cycles where pulse skipping may occur.