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Features

  • LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility
  • High-Speed Operation: tpd (A to Y) = 12 ns typ (CL = 50 pF)
  • High Output Current: Fanout of 15 LSTTL Loads
  • Wide Operating Voltage: VCC = 4.5 to 5.5 V
  • Low Input Current: 1 µA max
  • Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
  • Ordering Information

Description

The HD74HCT540 is an inverting buffer and the HD74HCT541 is a non-inverting buffer. The 3-state control gate operates as a two-input NOR such that if either G1 or G2 are high, all eight outputs are in the high-impedance state.

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