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CMOS Dual JK Flip Flop

Package Information

CAD Model:View CAD Model
Pkg. Type:DIE
Pkg. Code:
Lead Count (#):
Pkg. Dimensions (mm):0.0 x 0.0 x 0.00
Pitch (mm):

Environmental & Export Classifications

Moisture Sensitivity Level (MSL)Not Applicable
Pb (Lead) FreeYes
ECCN (US)9A515.e.1
HTS (US)8542.39.0090
RoHS (HCS109HMSR)EnglishJapanese

Product Attributes

Pkg. TypeDIE
Carrier TypeDie Waffle Pack
Moisture Sensitivity Level (MSL)Not Applicable
Pkg. Dimensions (mm)0.0 x 0.0 x 0.00
DLA SMD5962R9578401V9A
Pb (Lead) FreeYes
Pb Free CategoryNone
MOQ100
Temp. Range (°C)-55 to +125°C
DSEE (MeV·cm2/mg)SEL free
Lead CompliantNo
Qualification LevelQML Class V (space)
RatingSpace
TID HDR (krad(Si))200
TID LDR (krad(Si))ELDRS free
Tape & ReelNo

Description

The Intersil HCS109MS is a radiation hardened dual J-K flip-flop with Set and Reset. The flip-flop changes state with the positive transition of the clock. The HCS109MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of the radiation hardened, high-speed, CMOS/SOS logic family. The HCS109MS is supplied in a 16-lead Ceramic Flatpack (K suffix) or an SBDIP package (D suffix).