Package Information
| CAD Model: | View CAD Model |
| Pkg. Type: | TSSOP |
| Pkg. Code: | PAG48 |
| Lead Count (#): | 48 |
| Pkg. Dimensions (mm): | 12.5 x 6.1 x 1.0 |
| Pitch (mm): | 0.5 |
Environmental & Export Classifications
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
| Moisture Sensitivity Level (MSL) | 1 |
Product Attributes
| Pkg. Type | TSSOP |
| Lead Count (#) | 48 |
| Pb (Lead) Free | Yes |
| Carrier Type | Tube |
| Advanced Features | Programmable Clock, Spread Spectrum |
| App Jitter Compliance | PCIe Gen1 |
| C-C Jitter Max P-P (ps) | 50 |
| Chipset Manufacturer | Intel |
| Chipset Name | DB800 |
| Core Voltage (V) | 3.3 |
| Feedback Input | No |
| Input Freq (MHz) | 200 |
| Input Type | HCSL |
| Inputs (#) | 1 |
| Length (mm) | 12.5 |
| MOQ | 585 |
| Moisture Sensitivity Level (MSL) | 1 |
| Output Banks (#) | 1 |
| Output Freq Range (MHz) | 200 |
| Output Skew (ps) | 50 |
| Output Type | HCSL |
| Output Voltage (V) | 3.3 |
| Outputs (#) | 8 |
| Package Area (mm²) | 76.3 |
| Pb Free Category | e3 Sn |
| Pitch (mm) | 0.5 |
| Pkg. Dimensions (mm) | 12.5 x 6.1 x 1.0 |
| Prog. Clock | Yes |
| Prog. Interface | SMBUS |
| Published | No |
| Qty. per Carrier (#) | 39 |
| Qty. per Reel (#) | 0 |
| Reference Output | No |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Spread Spectrum | Yes |
| Tape & Reel | No |
| Temp. Range (°C) | 0 to 70°C |
| Thickness (mm) | 1 |
| Width (mm) | 6.1 |
Resources for CV141
Description
The CV141 differential buffer is compliant with Intel DB800 specifications. It is intended to distribute the SRC (serial reference clock) as a companion chip to the main clock of the CK409, CK410/CK410M, CK410B, etc. PLL is off in bypass mode and has no clock detect.