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3.3V Phase-Lock Loop Clock Driver Zero Delay Buffer

Package Information

CAD Model:View CAD Model
Pkg. Type:TSSOP
Pkg. Code:PGG24
Lead Count (#):24
Pkg. Dimensions (mm):7.8 x 4.4 x 1.0
Pitch (mm):0.65

Environmental & Export Classifications

Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090
Moisture Sensitivity Level (MSL)1

Product Attributes

Pkg. TypeTSSOP
Lead Count (#)24
Pb (Lead) FreeYes
Carrier TypeReel
Core Voltage (V)3.3
Input Freq (MHz)50 - 175
Input TypeLVCMOS
Inputs (#)1
Length (mm)7.8
MOQ3000
Moisture Sensitivity Level (MSL)1
Output Banks (#)1
Output Freq Range (MHz)50 - 175
Output TypeLVCMOS
Output Voltage (V)3.3
Outputs (#)10
Package Area (mm²)34.3
Pb Free Categorye3 Sn
Pitch (mm)0.65
Pkg. Dimensions (mm)7.8 x 4.4 x 1.0
PublishedNo
Qty. per Carrier (#)0
Qty. per Reel (#)3000
Reel Size (in)13
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelYes
Temp. Range (°C)0 to 70°C
Thickness (mm)1
Width (mm)4.4

Description

3.3V Phase lock loop, 1:10 Clock driver, zero delay buffer.  With the 74ALVCF162835A provides a complete solution for PC-100 and PC-133 SDRAM solutions.