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Renesas Electronics Corporation

Renesas’ Timing product portfolio has been acquired by SiTime.

Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.

PCI Express® Jitter Attenuator

Package Information

CAD Model:View CAD Model
Pkg. Type:VFQFPN
Pkg. Code:NLG32
Lead Count (#):32
Pkg. Dimensions (mm):5.0 x 5.0 x 0.9
Pitch (mm):0.5

Environmental & Export Classifications

Pb (Lead) FreeYes
Moisture Sensitivity Level (MSL)3
ECCN (US)
HTS (US)

Product Attributes

Pkg. TypeVFQFPN
Lead Count (#)32
Pb (Lead) FreeYes
Carrier TypeReel
App Jitter CompliancePCIe Gen1, PCIe Gen2
C-C Jitter Typ P-P (ps)30
Core Voltage (V)3.3
Feedback InputNo
Input Freq (MHz)90 - 140
Input TypeHCSL, HSTL, LVDS, LVPECL, SSTL
Inputs (#)1
Length (mm)5
MOQ2500
Moisture Sensitivity Level (MSL)3
Output Banks (#)1
Output Freq Range (MHz)90 - 140
Output TypeHCSL
Output Voltage (V)3.3
Outputs (#)1
Package Area (mm²)25
Pb Free Categorye3 Sn
Phase Jitter Typ RMS (ps)2.31
Pitch (mm)0.5
Pkg. Dimensions (mm)5.0 x 5.0 x 0.9
Prog. ClockNo
Qty. per Carrier (#)0
Qty. per Reel (#)2500
Reel Size (in)13
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelYes
Temp. Range (°C)0 to 70°C
Thickness (mm)0.9
Width (mm)5

Description

The 9DB202-01 is a high performance 1-to-1 Differential-to HCSL Jitter Attenuator designed for use in PCI Express®™ systems. In some PCI Express® systems, such as those found in desktop PCs, the PCI Express® clocks are generated from a low bandwidth, high phase noise PLL frequency synthesizer. In these systems, a jitter attenuating device may be necessary in order to reduce high frequency random and deterministic jitter components from the PLL synthesizer and from the system board.