Renesas’ Timing product portfolio has been acquired by SiTime.
Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.
| CAD Model: | View CAD Model |
| Pkg. Type: | TSSOP |
| Pkg. Code: | PAG64 |
| Lead Count (#): | 64 |
| Pkg. Dimensions (mm): | 17.0 x 6.1 x 1.0 |
| Pitch (mm): | 0.5 |
| Moisture Sensitivity Level (MSL) | 1 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
| Lead Count (#) | 64 |
| Carrier Type | Reel |
| Moisture Sensitivity Level (MSL) | 1 |
| Qty. per Reel (#) | 2000 |
| Qty. per Carrier (#) | 0 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | 0 to 70°C |
| Accepts Spread Spec Input | Yes |
| Advanced Features | HW PLL mode control, Multiple SMBus addresses |
| App Jitter Compliance | PCIe Gen1, PCIe Gen2, QPI, FBD |
| Architecture | Common |
| C-C Jitter Max P-P (ps) | 50 |
| Chipset Manufacturer | Intel |
| Chipset Name | 5400, 5500, Tylersburg, Seaburg |
| Core Voltage (V) | 3.3 |
| Diff. Input Signaling | HCSL |
| Diff. Inputs | 1 |
| Diff. Output Signaling | HCSL |
| Diff. Outputs | 12 |
| Diff. Termination Resistors | 48 |
| Feedback Input | No |
| Function | Zero Delay Buffer |
| Input Freq (MHz) | 400 |
| Input Type | HCSL |
| Inputs (#) | 1 |
| Length (mm) | 17 |
| MOQ | 2000 |
| Output Banks (#) | 1 |
| Output Freq Range (MHz) | 33.33 - 400 |
| Output Skew (ps) | 50 |
| Output Type | HCSL |
| Output Voltage (V) | 3.3 |
| Outputs (#) | 12 |
| PLL | Yes |
| Package Area (mm²) | 103.7 |
| Phase Jitter Max RMS (ps) | 0.5 |
| Phase Jitter Typ RMS (ps) | 0.25 |
| Pitch (mm) | 0.5 |
| Pkg. Dimensions (mm) | 17.0 x 6.1 x 1.0 |
| Pkg. Type | TSSOP |
| Power Consumption Typ (mW) | 894 |
| Price (USD) | $11.1342 |
| Product Category | PCI Express Clocks |
| Prog. Clock | No |
| Prog. Interface | SMBUS |
| Reel Size (in) | 13 |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Supply Voltage (V) | 3.3 - 3.3 |
| Tape & Reel | Yes |
| Thickness (mm) | 1 |
| Width (mm) | 6.1 |
The 9DB1200 is an Intel DB1200 Differential Buffer Specification device. This buffer provides 12 differential clocks at frequencies ranging from 100 MHz to 400 MHz. The 9DB1200 is driven by a differential output from a CK410B+ or CK509B main clock generator.