Renesas’ Timing product portfolio has been acquired by SiTime.
Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.
| CAD Model: | View CAD Model |
| Pkg. Type: | SSOP |
| Pkg. Code: | PVG56 |
| Lead Count (#): | 56 |
| Pkg. Dimensions (mm): | 18.4 x 7.5 x 2.3 |
| Pitch (mm): | 0.64 |
| Pb (Lead) Free | Yes |
| Moisture Sensitivity Level (MSL) | 1 |
| ECCN (US) | |
| HTS (US) |
| Pkg. Type | SSOP |
| Lead Count (#) | 56 |
| Pb (Lead) Free | Yes |
| Carrier Type | Reel |
| C-C Jitter Max P-P (ps) | 250 |
| Chipset Manufacturer | Intel |
| Core Voltage (V) | 3.3 |
| Die Form | No |
| Function | Clock Generator |
| Input Freq (MHz) | 14.318 - 200 |
| Length (mm) | 18.4 |
| MOQ | 1000 |
| Moisture Sensitivity Level (MSL) | 1 |
| Output Freq Range (MHz) | 14.318 - 200 |
| Output Voltage (V) | 3.3 |
| Package Area (mm²) | 138 |
| Pb Free Category | e3 Sn |
| Pitch (mm) | 0.64 |
| Pkg. Dimensions (mm) | 18.4 x 7.5 x 2.3 |
| Qty. per Carrier (#) | 0 |
| Qty. per Reel (#) | 1000 |
| Reel Size (in) | 13 |
| Reference Output | No |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Spread Spectrum | Yes |
| Supply Voltage (V) | 3.3 - 3.3 |
| Tape & Reel | Yes |
| Temp. Range (°C) | 0 to 70°C |
| Thickness (mm) | 2.3 |
| Width (mm) | 7.5 |
| Xtal Freq (MHz) | 14.3182 - 14.3182 |
| Xtal Inputs (#) | 1 |
The IDT94201 belongs to IDT new generation of programmable system clock generators. It employs serial programming I2C interface as a vehicle for changing output functions, changing output frequency, configuring output strength, configuring output to output skew, changing spread spectrum amount, changing group divider ratio and dis/enabling individual clocks. This device also has IDT propriety 'Watchdog Timer' technology which will reset the frequency to a safe setting if the system become unstable from over clocking.