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Renesas Electronics Corporation

Renesas’ Timing product portfolio has been acquired by SiTime.

Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.

Frequency Timing Generator for Dual Server/Workstation Systems

Package Information

CAD Model:View CAD Model
Pkg. Type:SSOP
Pkg. Code:PVG56
Lead Count (#):56
Pkg. Dimensions (mm):18.4 x 7.5 x 2.3
Pitch (mm):0.64

Environmental & Export Classifications

Pb (Lead) FreeYes
Moisture Sensitivity Level (MSL)1
ECCN (US)
HTS (US)

Product Attributes

Pkg. TypeSSOP
Lead Count (#)56
Pb (Lead) FreeYes
Carrier TypeReel
C-C Jitter Max P-P (ps)150
Chipset ManufacturerServerworks
Core Voltage (V)3.3
Diff. Output SignalingHCSL
FunctionClock Generator
Input Freq (MHz)14.32 - 14.32
Length (mm)18.4
MOQ1000
Moisture Sensitivity Level (MSL)1
Output Freq Range (MHz)14.32 - 133
Output Skew (ps)175
Output Voltage (V)0.7V, 3.3V
Package Area (mm²)138
Pb Free Categorye3 Sn
Pitch (mm)0.64
Pkg. Dimensions (mm)18.4 x 7.5 x 2.3
Qty. per Carrier (#)0
Qty. per Reel (#)1000
Reel Size (in)13
Reference OutputYes
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Spread SpectrumYes
Supply Voltage (V)3.3 - 3.3
Tape & ReelYes
Temp. Range (°C)0 to 70°C
Thickness (mm)2.3
Width (mm)7.5
Xtal Freq (MHz)14.32 - 14.32
Xtal Inputs (#)1

Description

The IDT932S200 is a dual CPU clock generator for serverworks HE-T, HE-SL-T, LE-T chipsets for P III type processors in a Dual-CPU system. Single ended CPU clocks provide faster than 1.5V/ns transition times by parallel connection of 2 CPU pins to each processor. Spread Spectrum may be enabled by driving the SPREAD# pin active. Spread spectrum typically reduces system EMI by 8dB to 10dB. This simplifies EMI qualification without resorting to board design iterations or costly shielding. The IDT932S200 employs a proprietary closed loop design, which tightly controls the percentage of spreading over process and temperature variations.