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8P34S1208-1 2:8 LVDS Fanout Buffer Block Diagram
3D illustration featuring top and bottom views of VFQFPN IC chip package with 40 lead count.
8P34S1208-1 2:8 LVDS Fanout Buffer Block Diagram
3D illustration featuring top and bottom views of VFQFPN IC chip package with 40 lead count.

8P34S1208-1NLGI

Active
2:8 LVDS 1.8V/2.5V Fanout Buffer for 1PPS and High-Speed Clocks with Individual OE Control
8P34S1208-1 DatasheetLearn more about 8P34S1208-1

Package Information

CAD Model:View CAD Model
Pkg. Type:VFQFPN
Pkg. Code:NLG40
Lead Count (#):40
Pkg. Dimensions (mm):6.0 x 6.0 x 0.9
Pitch (mm):0.5

Environmental & Export Classifications

Moisture Sensitivity Level (MSL)3
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

Product Attributes

Pkg. TypeVFQFPN
Lead Count (#)40
Carrier TypeTray
Moisture Sensitivity Level (MSL)3
Qty. per Reel (#)0
Qty. per Carrier (#)490
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)-40 to 85°C
Additive Phase Jitter Typ RMS (fs)50
Adjustable PhaseNo
Advanced FeaturesIndividual OE control
Channels (#)1
Input Freq (MHz)2000
Inputs (#)2
Length (mm)6
Longevity2040 Apr
MOQ490
Noise Floor (dBc/Hz)-160
Output Freq Range (MHz)2000
Output Skew (ps)20
Output TypeLVDS
Output Voltage (V)1.8V, 2.5V
Outputs (#)8
Pitch (mm)0.5
Pkg. Dimensions (mm)6.0 x 6.0 x 0.9
Product CategoryClock Buffers & Drivers, RF Buffers
Supply Voltage (V)1.8 - 2.5
Tape & ReelNo
Thickness (mm)0.9
Width (mm)6

Description

The 8P34S1208-1 is a high-performance differential LVDS fanout buffer. The device is designed for the fanout of 1PPS signals or high-frequency, very low additive phase-noise clock and data signals.

The 8P34S1208-1 supports fail-safe operation and is characterized to operate from a 1.8V or 2.5V power supply. Guaranteed output-to-output and part-to-part skew characteristics make the device ideal for clock distribution applications that demand well-defined performance and repeatability.

Two selectable differential inputs and eight low skew outputs are available. The integrated bias voltage reference enables easy interfacing of single-ended signals to the device inputs. The device is optimized for low power consumption and low additive phase noise.

The 8P34S1208-1 has an individual OE control pin for each output, which provides excellent control over the output enable functions.

Learn more about 8P34S1208-1