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Renesas Electronics Corporation
SETS for SyncE and OTN

Package Information

CAD Model:View CAD Model
Pkg. Type:VFQFPN
Pkg. Code:NLG72
Lead Count (#):72
Pkg. Dimensions (mm):10.0 x 10.0 x 1.0
Pitch (mm):0.5

Environmental & Export Classifications

Moisture Sensitivity Level (MSL)3
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

Product Attributes

Lead Count (#)72
Carrier TypeReel
Moisture Sensitivity Level (MSL)3
Qty. per Reel (#)2500
Qty. per Carrier (#)0
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)0 to 70°C
Country of AssemblyTAIWAN
Country of Wafer FabricationSINGAPORE
ApplicationSystem Synchronizer, SETS
Channels (#)4
Clock SupportG.813, G.8262, G.8262.1, GR-1244-CORE, GR-253-CORE
Diff. Inputs4
Diff. Outputs12
Family NameClockMatrix
Fractional Output Dividers (#)8
FunctionMulti-channel DPLL / DCO
Input Freq (MHz)0.001 - 1000
Inputs (#)8
Length (mm)10
MOQ2500
Output Freq Range (MHz)5.0E-7 - 1000
Output Skew (ps)50
Outputs (#)24
Phase Jitter Typ RMS (ps)0.15
Pitch (mm)0.5
Pkg. Dimensions (mm)10.0 x 10.0 x 1.0
Pkg. TypeVFQFPN
Product CategoryClockMatrix, IEEE 1588, Network Synchronization
Prog. InterfaceI2C, SPI
Reel Size (in)13
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelYes
Thickness (mm)1
Width (mm)10

Description

The 8A34046 Synchronous Equipment Timing Source (SETS) for Synchronous Ethernet (SyncE) and Optical Transport Network (OTN) is a highly integrated timing device with four Digital PLL (DPLL) channels and four Digitally Controlled Oscillator (DCO) channels. The device integrates the timing blocks necessary to implement the SETS function as described in ITU-T G.8264.

The 8A34046 DPLL channels can be configured to comply with ITU-T G.8262 and G.8262.1 or as jitter attenuators; they can also be configured as DCOs. The DCO channels can be connected to a DPLL channel to supply additional outputs and frequencies for that DPLL; alternatively, they can be controlled by external software or they can free run based on the local oscillator. The device can be used as a single timing and synchronization source for a system or two of these devices can be used as a redundant pair for improved system reliability. Input-to-input, input-to-output, and output-to-output phase skew can all be precisely managed. The device outputs ultra-low jitter clocks that can directly synchronize SerDes running at up to 28Gbps; as well as CPRI/OBSAI, SONET/SDH, and PDH interfaces.

To see other devices in this product family, visit the ClockMatrix Timing Solutions page.