Renesas’ Timing product portfolio has been acquired by SiTime.
Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.
| CAD Model: | View CAD Model |
| Pkg. Type: | SOIC |
| Pkg. Code: | DCG8 |
| Lead Count (#): | 8 |
| Pkg. Dimensions (mm): | 4.9 x 3.9 x 1.5 |
| Pitch (mm): | 1.27 |
| Moisture Sensitivity Level (MSL) | 1 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
| Lead Count (#) | 8 |
| Carrier Type | Tube |
| Moisture Sensitivity Level (MSL) | 1 |
| Input Type | LVDS, LVPECL, LVHSTL, SSTL, HCSL, LVCMOS, GTL |
| Qty. per Reel (#) | 0 |
| Qty. per Carrier (#) | 97 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | -40 to 85°C |
| Additive Phase Jitter Typ RMS (fs) | 170 |
| Additive Phase Jitter Typ RMS (ps) | 0.17 |
| Core Voltage (V) | 3.3 |
| Divider Value | 1, 2 |
| Function | Divider |
| Input Freq (MHz) | 1000 |
| Inputs (#) | 1 |
| Length (mm) | 4.9 |
| MOQ | 97 |
| Output Banks (#) | 1 |
| Output Freq Range (MHz) | 1000 |
| Output Type | LVDS |
| Output Voltage (V) | 3.3 |
| Outputs (#) | 1 |
| Package Area (mm²) | 19.1 |
| Pitch (mm) | 1.27 |
| Pkg. Dimensions (mm) | 4.9 x 3.9 x 1.5 |
| Pkg. Type | SOIC |
| Product Category | Clock Buffers & Drivers |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Tape & Reel | No |
| Thickness (mm) | 1.5 |
| Width (mm) | 3.9 |
The 87421I is a high performance ÷1/÷2 Differential-to-LVDS Clock Generator. The CLK, nCLK pair can accept most standard differential input levels. The 87421I is characterized to operate from a 3.3V power supply. Guaranteed part-to-part skew characteristics make the 87421I ideal for those clock distribution applications demanding well defined performance and repeatability.