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LVCMOS Clock Generator

Package Information

CAD Model:View CAD Model
Pkg. Type:PLCC
Pkg. Code:PLG28
Lead Count (#):28
Pkg. Dimensions (mm):11.5 x 11.5 x 3.63
Pitch (mm):1.27

Environmental & Export Classifications

Moisture Sensitivity Level (MSL)3
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

Product Attributes

Lead Count (#)28
Carrier TypeTube
Moisture Sensitivity Level (MSL)3
Qty. per Reel (#)0
Qty. per Carrier (#)38
Package Area (mm²)132.3
Pitch (mm)1.27
Pkg. Dimensions (mm)11.5 x 11.5 x 3.63
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)-40 to 85°C
Advanced FeaturesFeedback Input
C-C Jitter Max P-P (ps)150
Core Voltage (V)3.3
Feedback InputYes
Input Freq (MHz)2.5 - 100
Input TypeLVCMOS
Inputs (#)2
Length (mm)11.5
MOQ38
Output Banks (#)3
Output Freq Range (MHz)2.5 - 160
Output Skew (ps)300
Output TypeLVCMOS
Output Voltage (V)3.3
Outputs (#)8
Pkg. TypePLCC
Prog. ClockNo
PublishedNo
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelNo
Thickness (mm)3.63
Width (mm)11.5

Description

The 870919I-01 is an LVCMOS clock generator that uses an internal phase lock loop (PLL) for frequency multiplication and to lock the low-skew outputs to the selected reference clock. The device offers eight outputs. The PLL loop filter is completely internal and does not require external components. Several output configurations of the PLL feedback and a divide-by-2 (controlled by FREQ_SEL) allow applications to optimize frequency generation over a wide range of input reference frequencies. The PLL can also be disabled by the PLL_EN control signal to allow for low frequency or DC testing. The LOCK output asserts to indicate when phase-lock has been achieved. The 870919I-01 device is a member of the family of high performance clock solutions from IDT.