Package Information
| CAD Model: | View CAD Model |
| Pkg. Type: | TSSOP |
| Pkg. Code: | PGG16 |
| Lead Count (#): | 16 |
| Pkg. Dimensions (mm): | 5.0 x 4.4 x 1.0 |
| Pitch (mm): | 0.65 |
Environmental & Export Classifications
| Moisture Sensitivity Level (MSL) | 1 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
Product Attributes
| Lead Count (#) | 16 |
| Carrier Type | Reel |
| Moisture Sensitivity Level (MSL) | 1 |
| Qty. per Reel (#) | 2500 |
| Qty. per Carrier (#) | 0 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | -40 to 85°C |
| Additive Phase Jitter Typ RMS (fs) | 21 |
| Additive Phase Jitter Typ RMS (ps) | 0.021 |
| Adjustable Phase | No |
| Advanced Features | Universal outputs |
| Channels (#) | 1 |
| Core Voltage (V) | 2.5V, 3.3V |
| Function | Buffer, Multiplexer |
| Input Freq (MHz) | 3000 |
| Input Type | CML, LVDS, LVPECL, SSTL |
| Inputs (#) | 2 |
| Length (mm) | 5 |
| MOQ | 2500 |
| Output Banks (#) | 1 |
| Output Freq Range (MHz) | 3000 |
| Output Skew (ps) | 25 |
| Output Type | LVDS, LVPECL |
| Output Voltage (V) | 2.5V, 3.3V |
| Outputs (#) | 2 |
| Package Area (mm²) | 22 |
| Pitch (mm) | 0.65 |
| Pkg. Dimensions (mm) | 5.0 x 4.4 x 1.0 |
| Pkg. Type | TSSOP |
| Prog. Interface | Pin select |
| Published | No |
| Reel Size (in) | 13 |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Supply Voltage (V) | 2.5 - 2.5, 3.3 - 3.3 |
| Tape & Reel | Yes |
| Thickness (mm) | 1 |
| Width (mm) | 4.4 |
Resources for 859S0212I
Description
The 859S0212I is a 2:2 Differential-to-LVPECL/ LVDS Clock Multiplexer which can operate up to 3GHz. The 859S0212I has 2 selectable differential PCLKx, nPCLKx clock inputs. The PCLKx, nPCLKx input pairs can accept LVPECL, LVDS, CML or SSTL levels. The fully differential architecture and low propagation delay make it ideal for use in clock distribution circuits. The clock select pin has an internal pulldown resistor.