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8:1 Differential-to-LVDS Clock Multiplexer

Package Information

CAD Model: View CAD Model
Pkg. Type: TSSOP
Pkg. Code: PGG24
Lead Count (#): 24
Pkg. Dimensions (mm): 7.8 x 4.4 x 1.0
Pitch (mm): 0.65

Environmental & Export Classifications

Moisture Sensitivity Level (MSL) 1
Pb (Lead) Free Yes
ECCN (US) EAR99
HTS (US) 8542.39.0090

Product Attributes

Lead Count (#) 24
Carrier Type Reel
Moisture Sensitivity Level (MSL) 1
Qty. per Reel (#) 3000
Qty. per Carrier (#) 0
Pb (Lead) Free Yes
Pb Free Category e3 Sn
Temp. Range (°C) -40 to 85°C
Country of Assembly TAIWAN
Country of Wafer Fabrication AUSTRIA
Additive Phase Jitter Typ RMS (fs) 65
Additive Phase Jitter Typ RMS (ps) 0.065
Core Voltage (V) 3.3
Function Multiplexer
Input Freq (MHz) 2500
Input Type LVDS, LVPECL, SSTL
Inputs (#) 8
Length (mm) 7.8
MOQ 3000
Output Banks (#) 1
Output Freq Range (MHz) 2500
Output Type LVDS
Output Voltage (V) 3.3
Outputs (#) 1
Package Area (mm²) 34.3
Pitch (mm) 0.65
Pkg. Dimensions (mm) 7.8 x 4.4 x 1.0
Pkg. Type TSSOP
Published No
Reel Size (in) 13
Requires Terms and Conditions Does not require acceptance of Terms and Conditions
Tape & Reel Yes
Thickness (mm) 1
Width (mm) 4.4

Description

The 854S058I is an 8:1 Differential-to-LVDS Clock Multiplexer which can operate up to 2.5GHz. The 854S058I has 8 selectable differential clock inputs. The PCLK, nPCLK input pairs can accept LVPECL, LVDS or SSTL levels. The fully differential architecture and low propagation delay make it ideal for use in clock distribution circuits. The select pins have internal pulldown resistors. The SEL2 pin is the most significant bit and the binary number applied to the select pins will select the same numbered data input (i.e., 000 selects PCLK0, nPCLK0).