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Low Skew,1-to-6,Crystal-to-LVDS Fanout Buffer

Package Information

CAD Model:View CAD Model
Pkg. Type:TSSOP
Pkg. Code:PGG24
Lead Count (#):24
Pkg. Dimensions (mm):7.8 x 4.4 x 1.0
Pitch (mm):0.65

Environmental & Export Classifications

Moisture Sensitivity Level (MSL)1
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

Product Attributes

Lead Count (#)24
Carrier TypeReel
Moisture Sensitivity Level (MSL)1
Qty. per Reel (#)3000
Qty. per Carrier (#)0
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)0 to 70°C
Additive Phase Jitter Typ RMS (fs)232
Additive Phase Jitter Typ RMS (ps)0.232
Core Voltage (V)2.5V, 3.3V
FunctionBuffer, Multiplexer
Input Freq (MHz)266
Input TypeCrystal, HCSL, LVDS, LVCMOS, HSTL, LVPECL
Inputs (#)3
Length (mm)7.8
MOQ3000
Output Banks (#)1
Output Freq Range (MHz)266
Output Skew (ps)50
Output TypeLVDS
Output Voltage (V)2.5V, 3.3V
Outputs (#)6
Package Area (mm²)34.3
Pitch (mm)0.65
Pkg. Dimensions (mm)7.8 x 4.4 x 1.0
Pkg. TypeTSSOP
PublishedNo
Reel Size (in)13
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelYes
Thickness (mm)1
Width (mm)4.4

Description

The 8546-01 is a low skew, high performance 1-to-6 Crystal Oscillator-to-LVDS Fanout Buffer. The 8546-01 has selectable crystal, single ended or differential clock inputs. The single-ended clock input accepts LVCMOS or LVTTL input levels and translate them to LVDS levels. The CLK1, nCLK1 pair can accept most standard differential input levels. The output enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/ deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 8546-01 ideal for those applications demanding well defined performance and repeatability.