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Low Skew,1-to-9 Differential-to-3.3V,2.5V LVPECL/ECL Fanout Buffer

Package Information

CAD Model:View CAD Model
Pkg. Type:TQFP
Pkg. Code:PRG32
Lead Count (#):32
Pkg. Dimensions (mm):7.0 x 7.0 x 1.4
Pitch (mm):0.8

Environmental & Export Classifications

Moisture Sensitivity Level (MSL)3
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

Product Attributes

Lead Count (#)32
Carrier TypeTray
Moisture Sensitivity Level (MSL)3
Qty. per Reel (#)0
Qty. per Carrier (#)250
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)-40 to 85°C
Country of AssemblyTAIWAN
Country of Wafer FabricationAUSTRIA
Core Voltage (V)2.5V, 3.3V
FunctionBuffer, Multiplexer
Input Freq (MHz)1600
Input TypeCML, HCSL, HSTL, LVDS, LVPECL, SSTL
Inputs (#)2
Length (mm)7
MOQ250
Output Banks (#)1
Output Freq Range (MHz)1600
Output Skew (ps)55
Output TypeLVPECL
Output Voltage (V)2.5V, 3.3V
Outputs (#)9
Package Area (mm²)49
Pitch (mm)0.8
Pkg. Dimensions (mm)7.0 x 7.0 x 1.4
Pkg. TypeTQFP
Price (USD)$17.78402
PublishedNo
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelNo
Thickness (mm)1.4
Width (mm)7

Description

The 853S031I is a low skew, high performance 1-to-9 Differential-to-2.5V/3.3V LVPECL/ECL Fanout Buffer. The 853S031I has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential input levels. The PCLK, nPCLK pair can accept LVPECL, LVDS, CML or SSTL input levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 853S031I ideal for high performance workstation and server applications.