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Low Skew,1-to-5 Differential-to-2.5V,3.3V LVPECL Fanout Buffer

Package Information

CAD Model:View CAD Model
Pkg. Type:SOIC
Pkg. Code:PSG20
Lead Count (#):20
Pkg. Dimensions (mm):12.8 x 7.6 x 2.34
Pitch (mm):1.27

Environmental & Export Classifications

Moisture Sensitivity Level (MSL)1
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

Product Attributes

Lead Count (#)20
Carrier TypeReel
Moisture Sensitivity Level (MSL)1
Qty. per Reel (#)1000
Qty. per Carrier (#)0
Package Area (mm²)97.3
Pitch (mm)1.27
Pkg. Dimensions (mm)12.8 x 7.6 x 2.34
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)-40 to 85°C
Additive Phase Jitter Typ RMS (fs)60
Additive Phase Jitter Typ RMS (ps)0.06
Core Voltage (V)2.5V, 3.3V
FunctionBuffer, Multiplexer
Input Freq (MHz)700
Input TypeHCSL, HSTL, LVDS, LVPECL, SSTL
Inputs (#)2
Length (mm)12.8
MOQ1000
Output Banks (#)1
Output Freq Range (MHz)700
Output Skew (ps)30
Output TypeLVPECL
Output Voltage (V)2.5V, 3.3V
Outputs (#)5
Pkg. TypeSOIC
PublishedNo
Reel Size (in)13
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelYes
Thickness (mm)2.34
Width (mm)7.6

Description

The 85314I-11 is a low skew, high performance 1-to-5 Differential-to-2.5V/3.3V LVPECL fanout buffer. The 85314I-11 has two selectable differential clock inputs. The CLK0, nCLK0 and CLK1, nCLK1 pairs can accept most standard differential input levels. The clock enable is internally synchronized to eliminate runt clock pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 85314I-11 ideal for those applications demanding well defined performance and repeatability.