Package Information
| CAD Model: | View CAD Model |
| Pkg. Type: | TSSOP |
| Pkg. Code: | PGG24 |
| Lead Count (#): | 24 |
| Pkg. Dimensions (mm): | 7.8 x 4.4 x 1.0 |
| Pitch (mm): | 0.65 |
Environmental & Export Classifications
| Moisture Sensitivity Level (MSL) | 1 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
Product Attributes
| Lead Count (#) | 24 |
| Carrier Type | Tube |
| Moisture Sensitivity Level (MSL) | 1 |
| Qty. per Reel (#) | 0 |
| Qty. per Carrier (#) | 62 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | 0 to 70°C |
| Core Voltage (V) | 3.3 |
| Family Name | Low Jitter Clocks |
| Feedback Input | No |
| Input Freq (MHz) | 23.33 - 29.16, 28 - 35 |
| Input Type | Crystal |
| Inputs (#) | 2 |
| Length (mm) | 7.8 |
| MOQ | 62 |
| Output Banks (#) | 2 |
| Output Freq Range (MHz) | 112 - 700 |
| Output Skew (ps) | 30 |
| Output Type | LVDS |
| Output Voltage (V) | 3.3 |
| Outputs (#) | 3 |
| Package Area (mm²) | 34.3 |
| Phase Jitter Typ RMS (ps) | 0.64 |
| Pitch (mm) | 0.65 |
| Pkg. Dimensions (mm) | 7.8 x 4.4 x 1.0 |
| Pkg. Type | TSSOP |
| Prog. Clock | No |
| Published | No |
| Reference Output | No |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Spread Spectrum | No |
| Tape & Reel | No |
| Thickness (mm) | 1 |
| Width (mm) | 4.4 |
Resources for 844003
Description
The 844003 is a three differential output LVDS synthesizer designed to generate Ethernet reference clock frequencies. Using a 31.25MHz or 26.041666MHz, 18pF parallel resonant crystal, the following frequencies can be generated based on the settings of four frequency select pins (DIV_SEL[A1:A0], DIV_SEL[B1:B0]): 625MHz, 312.5MHz, 156.25MHz, and 125MHz. The 844003 has two output banks, Bank A with one differential LVDS output pair and Bank B with two differential LVDS output pairs.
The two banks have their own dedicated frequency select pins and can be independently set for the frequencies mentioned above. The 844003 uses Renesas' third-generation low phase noise VCO technology and can achieve 1ps or lower typical RMS phase jitter, easily meeting Ethernet jitter requirements. The 844003 is packaged in a small 24-pin TSSOP package.