Package Information
| CAD Model: | View CAD Model |
| Pkg. Type: | VFQFPN |
| Pkg. Code: | NLG32 |
| Lead Count (#): | 32 |
| Pkg. Dimensions (mm): | 5.0 x 5.0 x 0.9 |
| Pitch (mm): | 0.5 |
Environmental & Export Classifications
| Moisture Sensitivity Level (MSL) | 3 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
Product Attributes
| Lead Count (#) | 32 |
| Carrier Type | Tray |
| Moisture Sensitivity Level (MSL) | 3 |
| Qty. per Reel (#) | 0 |
| Qty. per Carrier (#) | 490 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | -40 to 85°C |
| 100M Non-SSC Outputs | 1 |
| 100M SSC Outputs | 0 |
| 25M Outputs | 3 |
| Advanced Features | Programmable Clock, 25M output(s), 33M output(s), 50M output(s), 66M output(s), 83M output(s), 100M output(s), 125M output(s), 133M output(s) |
| App Jitter Compliance | PCI/PCI-X |
| C-C Jitter Max P-P (ps) | 95 |
| Chipset Manufacturer | Cavium |
| Core Voltage (V) | 3.3 |
| Diff. Termination Resistors | 3 |
| Feedback Input | No |
| Function | Clock Generator |
| Input Freq (MHz) | 25 - 25 |
| Input Type | Crystal, LVCMOS, LVDS, LVPECL, SSTL |
| Inputs (#) | 2 |
| Length (mm) | 5 |
| MOQ | 490 |
| Output Banks (#) | 5 |
| Output Freq Range (MHz) | 25 - 25, 33.333 - 33.333, 50 - 50, 66.667 - 66.667, 83.333 - 83.333, 100 - 100, 125 - 125, 133.333 - 133.333 |
| Output Skew (ps) | 35 |
| Output Type | LVCMOS, LVPECL |
| Output Voltage (V) | 2.5V, 3.3V |
| Outputs (#) | 7 |
| PCI 33.33M Outputs (#) | 1 |
| Package Area (mm²) | 25 |
| Period Jitter Max P-P (ps) | 90 |
| Phase Jitter Typ RMS (ps) | 0.73 |
| Pitch (mm) | 0.5 |
| Pkg. Dimensions (mm) | 5.0 x 5.0 x 0.9 |
| Pkg. Type | VFQFPN |
| Power Consumption Typ (mW) | 745 |
| Product Category | General Purpose Clocks, Processor Clock Generators |
| Prog. Clock | No |
| Published | No |
| Reference Output | Yes |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Spread Spectrum | No |
| Supply Voltage (V) | 3.3 - 3.3 |
| Tape & Reel | No |
| Thickness (mm) | 0.9 |
| Width (mm) | 5 |
| Xtal Freq (MHz) | 25 - 25 |
Resources for 8430S07I
Description
The 8430S07I is a PLL-based clock generator specifically designed for Cavium Networks SoC processors. This high performance device is optimized to generate the processor core reference clock, the DDR reference clocks, the PCI/PCI-X bus clocks, and the clocks for both the Gigabit Ethernet MAC and PHY. The clock generator offers ultra low-jitter, low-skew clock outputs, and edge rates that easily meet the input requirements for the CN3005/CN3010/CN3020 processors. The output frequencies are generated from a 25MHz external input source or an external 25MHz parallel resonant crystal. The extended temperature range of the 8430S07I supports telecommunication, networking, and storage requirements.