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FemtoClock Crystal-to-HCSL Clock Generator

Package Information

CAD Model: View CAD Model
Pkg. Type: TSSOP
Pkg. Code: DQG28
Lead Count (#): 28
Pkg. Dimensions (mm): 9.7 x 6.1 x 1.0
Pitch (mm): 0.65

Environmental & Export Classifications

Moisture Sensitivity Level (MSL) 3
Pb (Lead) Free Yes
ECCN (US) EAR99
HTS (US) 8542.39.0090

Product Attributes

Lead Count (#) 28
Carrier Type Tube
Moisture Sensitivity Level (MSL) 3
Qty. per Reel (#) 0
Qty. per Carrier (#) 48
Pb (Lead) Free Yes
Pb Free Category e3 Sn
Temp. Range (°C) -40 to 85°C
App Jitter Compliance PCIe Gen1, PCIe Gen2
C-C Jitter Max P-P (ps) 50
Core Voltage (V) 3.3
Feedback Input No
Input Freq (MHz) 25 - 25
Input Type Crystal, LVCMOS
Inputs (#) 2
Length (mm) 9.7
MOQ 96
Output Banks (#) 1
Output Freq Range (MHz) 25 - 25, 100 - 100, 125 - 125, 200 - 200, 400 - 400
Output Skew (ps) 55
Output Type HCSL
Output Voltage (V) 3.3
Outputs (#) 2
Package Area (mm²) 47
Phase Jitter Typ RMS (ps) 0.4
Pitch (mm) 0.65
Pkg. Dimensions (mm) 9.7 x 6.1 x 1.0
Pkg. Type TSSOP
Prog. Clock No
Published No
Reference Output No
Requires Terms and Conditions Does not require acceptance of Terms and Conditions
Spread Spectrum No
Tape & Reel No
Thickness (mm) 1
Width (mm) 6.1

Description

The 841602I is an optimized PCIe and sRIO clock generator. The device uses a 25MHz parallel crystal to generate 100MHz and 125MHz clock signals, replacing solutions requiring multiple oscillator and fanout buffer solutions. The device has excellent phase jitter (< 1ps rms) suitable to clock components requiring precise and low-jitter PCIe or sRIO or both clock signals. Designed for telecom, networking and industrial applications, the 841602I can also drive the high-speed sRIO and PCIe SerDes clock inputs of communication processors, DSPs, switches and bridges.