| CAD Model: | View CAD Model |
| Pkg. Type: | CABGA |
| Pkg. Code: | AUG196 |
| Lead Count (#): | 196 |
| Pkg. Dimensions (mm): | 15.0 x 15.0 x 1.68 |
| Pitch (mm): | 1 |
| Pb (Lead) Free | Yes |
| Moisture Sensitivity Level (MSL) | 3 |
| ECCN (US) | |
| HTS (US) |
| Pkg. Type | CABGA |
| Lead Count (#) | 196 |
| Pb (Lead) Free | Yes |
| Carrier Type | Tray |
| Advanced Features | Full SETS (ITU-T G.8264), Hitless Reference Switching, External Sync Input, VCXO-based APLL |
| App Jitter Compliance | GR-1244-CORE, GR-253-CORE, ITU-T G.812, ITU-T G.8262. ITU-T G.813, ITU-T G.783, Stratum 3, Stratum 4E, Stratum 4, SMC, EEC-Option 1, EEC-Option 2 Clocks |
| Application | System Synchronizer |
| Channels (#) | 2 |
| Clock Support | G.813 Opt 1, G.813 Opt 2, G.8262 Opt 1, G.8262 Opt 2, GR-1244-CORE Stratum 4, GR-1244-CORE Stratum 4E, GR-1244-CORE Stratum 3, GR-253-CORE SONET Minimum Clock, GR-253-CORE SONET Stratum 3 |
| Core Voltage (V) | 3.3 |
| Diff. Inputs | 4 |
| Diff. Outputs | 4 |
| Input Freq (MHz) | 1.0E-6 - 644.531 |
| Input Freq Range Type | 1PPS (1 Hz), Composite Clock (G.703 64kbps), TDM, DS1, E1, SONET/SDH, Ethernet, Sync Pulse |
| Input Type | LVPECL, LVDS, LVCMOS |
| Inputs (#) | 16 |
| Length (mm) | 15 |
| MOQ | 126 |
| Moisture Sensitivity Level (MSL) | 3 |
| Output Banks (#) | 13 |
| Output Freq Range (MHz) | 1.0E-6 - 644.531 |
| Output Freq Range Type | 1PPS (1 Hz), Composite Clock (G.703 64kbps), TDM, DS1, E1, DS2, E3, DS3, 100BASE-T, STM-1/OC-3, STM-4/OC-12, 1000BASE-T/X, STM-16/OC-48, STM-64/OC-192/10GBASE-W, 10GBASE-R |
| Output Skew (ps) | 150 |
| Output Type | LVPECL, LVDS, LVCMOS |
| Output Voltage (V) | 3.3 |
| Outputs (#) | 13 |
| Package Area (mm²) | 225 |
| Pb Free Category | e1 SnAgCu |
| Phase Jitter Typ RMS (ps) | 0.23 |
| Pitch (mm) | 1 |
| Pkg. Dimensions (mm) | 15.0 x 15.0 x 1.68 |
| Price (USD) | $60.2736 |
| Prog. Clock | Yes |
| Prog. Interface | I2C, Serial, JTAG |
| Qty. per Carrier (#) | 126 |
| Qty. per Reel (#) | 0 |
| Reference Output | Yes |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Spread Spectrum | No |
| Tape & Reel | No |
| Temp. Range (°C) | 0 to 70°C |
| Thickness (mm) | 1.68 |
| Width (mm) | 15 |
The 82V3910 is a single-chip Synchronous Equipment Timing Source (SETS) for Synchronous Ethernet (SyncE). The 82V3910 complies with ITU-T G.8262 for EEC Options 1 and 2; and G.813 for SEC Options 1 and 2; it is suitable for SyncE, SONET, and SDH equipment. Its ultra-low jitter generation makes it particularly suitable for single-board systems where the SETS directly times 10GBASE-R, 10GBASE-W, OC-192/STM-64, or 40GBASE-R PHYs.
The high-integration architecture minimizes component count and board space by including a “T0” G.8262 compliant digital PLL (DPLL); and a “T4” rate converting DPLL to provide recovered line timing to a local Building Integrated Timing Supply (BITS) or Synchronization Supply Unit (SSU). Two independent jitter attenuating analog PLLs (APLLs) are also integrated; these APLLs generate clocks with jitter below 0.3ps RMS over the 10kHz to 20MHz integration range and can be used to directly time 10GbE or 40GbE network PHYs. The DPLLs lock to a wide variety of telecom and Ethernet reference frequencies and suppress incoming timing faults to generate highly reliable output clocks for optimal network performance. The T0 DPLL can lock directly to a one pulse-per-second (1 PPS) reference enabling the host system to use a low-cost GPS receiver for synchronization.
The 82V3910 offers a solution optimized for use in Ethernet switches, routers, multi-service switching platforms, wireless backhaul equipment, and other communications infrastructure. It is available in a 196-ball 15mm x 15mm CABGA package and supports the standard industrial temperature range from -40 °C to +85 °C.