Package Information
| CAD Model: | View CAD Model |
| Pkg. Type: | TQFP |
| Pkg. Code: | PP64 |
| Lead Count (#): | 64 |
| Pkg. Dimensions (mm): | 10.0 x 10.0 x 1.4 |
| Pitch (mm): | 0.5 |
Environmental & Export Classifications
| Pb (Lead) Free | No |
| Moisture Sensitivity Level (MSL) | 3 |
| ECCN (US) | |
| HTS (US) |
Product Attributes
| Lead Count (#) | 64 |
| Pb (Lead) Free | No |
| Carrier Type | Reel |
| Moisture Sensitivity Level (MSL) | 3 |
| Architecture | Uni-directional |
| Bus Width (bits) | 9 |
| Core Voltage (V) | 3.3 |
| Density (Kb) | 512 |
| Family Name | SuperSync |
| I/O Frequency (MHz) | 50 - 50 |
| I/O Type | 3.3 V LVTTL |
| Interface | Synchronous |
| Length (mm) | 10 |
| MOQ | 500 |
| Organization | 64K x 9 |
| Package Area (mm²) | 100 |
| Pb Free Category | e0 |
| Pitch (mm) | 0.5 |
| Pkg. Dimensions (mm) | 10.0 x 10.0 x 1.4 |
| Pkg. Type | TQFP |
| Published | No |
| Qty. per Carrier (#) | 0 |
| Qty. per Reel (#) | 500 |
| Reel Size (in) | 13 |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Tape & Reel | Yes |
| Temp. Range (°C) | 0 to 70°C |
| Thickness (mm) | 1.4 |
| Width (mm) | 10 |
Resources for 72V281
Description
The 72V281 is a 64K x 9 SuperSync FIFO memory with clocked read and write controls. It's a functionally compatible version of the 72281 designed to run off a 3.3V supply for very low power consumption. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. The period required by the retransmit operation and the first word data latency period is now fixed and short. (The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated on this SuperSync family.)