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8K x 36 x 2 Triple-Bus FIFO, 5.0V

Package Information

CAD Model: View CAD Model
Pkg. Type: TQFP
Pkg. Code: PK128
Lead Count (#): 128
Pkg. Dimensions (mm): 20.0 x 14.0 x 1.4
Pitch (mm): 0.5

Environmental & Export Classifications

Pb (Lead) Free No
Moisture Sensitivity Level (MSL) 3
ECCN (US)
HTS (US)

Product Attributes

Lead Count (#) 128
Pb (Lead) Free No
Carrier Type Tray
Architecture Bi-directional
Bus Width (bits) 36
Core Voltage (V) 5
Density (Kb) 512
Family Name Triple-Bus FIFO
Function Bus Matching
I/O Frequency (MHz) 66 - 66
I/O Type 5.0 V TTL
Interface Synchronous
Length (mm) 20
MOQ 36
Moisture Sensitivity Level (MSL) 3
Organization 8K x 36 x 2
Package Area (mm²) 280
Pb Free Category e0
Pitch (mm) 0.5
Pkg. Dimensions (mm) 20.0 x 14.0 x 1.4
Pkg. Type TQFP
Published No
Qty. per Carrier (#) 72
Qty. per Reel (#) 0
Requires Terms and Conditions Does not require acceptance of Terms and Conditions
Tape & Reel No
Temp. Range (°C) 0 to 70°C
Thickness (mm) 1.4
Width (mm) 14

Description

The 723676 is a 8K x 36 x 2 Triple Bus sync FIFO memory has two independent dual-port SRAM FIFOs on board each chip that can buffer data between a bidirectional 36-bit bus and two unidirectional 18-bit buses. FIFO data can be read and written using either 18-bit or 9-bit formats with a choice of Big- or Little-Endian configurations. Communication between each port may bypass the FIFOs via two mailbox registers. This device can operate in the IDT Standard mode or the first word fall through mode.