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Renesas Electronics Corporation
3.3V 128K x 36 ZBT Synchronous Flow-Through SRAM

Package Information

CAD Model:View CAD Model
Pkg. Type:TQFP
Pkg. Code:PKG100
Lead Count (#):100
Pkg. Dimensions (mm):20.0 x 14.0 x 1.4
Pitch (mm):0.65

Environmental & Export Classifications

Pb (Lead) FreeYes
Moisture Sensitivity Level (MSL)3
ECCN (US)3A991.b.2.a
HTS (US)8542.32.0041

Product Attributes

Lead Count (#)100
Pb (Lead) FreeYes
Carrier TypeTray
Moisture Sensitivity Level (MSL)3
ArchitectureZBT
Bus Width (bits)36
Core Voltage (V)3.3
Cycle Time (ns)80
Density (Kb)4608
I/O Voltage (V)2.5 - 2.5
Length (mm)20
MOQ144
Organization128K x 36
Output TypeFlowthrough
Package Area (mm²)280
Pb Free Categorye3 Sn
Pitch (mm)0.65
Pkg. Dimensions (mm)20.0 x 14.0 x 1.4
Pkg. TypeTQFP
Price (USD)$9.32306
Qty. per Carrier (#)72
Qty. per Reel (#)0
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelNo
Temp. Range (°C)-40 to 85°C
Thickness (mm)1.4
Width (mm)14

Description

The 71V547 3.3V CMOS SRAM is organized as 128K x 36 bits. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turn-around. The 71V547 contains address, data-in and control signal registers. The outputs are flow-through (no output data register). In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.