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3.3V 128K x 8 Asynchronous Static RAM Center Power & Ground Pinout

Package Information

CAD Model: View CAD Model
Pkg. Type: SOJ
Pkg. Code: PJG32
Lead Count (#): 32
Pkg. Dimensions (mm): 21.95 x 7.6 x 2.67
Pitch (mm): 1.27

Environmental & Export Classifications

Pb (Lead) Free Yes
Moisture Sensitivity Level (MSL) 3
ECCN (US) 3A991.b.2.a
HTS (US) 8542.32.0041

Product Attributes

Lead Count (#) 32
Pb (Lead) Free Yes
Carrier Type Reel
Moisture Sensitivity Level (MSL) 3
Country of Assembly TAIWAN
Country of Wafer Fabrication TAIWAN, UNITED STATES
Access Time (ns) 10
Architecture Asynchronous
Bus Width (bits) 8
Core Voltage (V) 3.3V
Density (Kb) 1024
I/O Voltage (V) 3.3 - 3.3
Length (mm) 21.95
MOQ 1000
Organization 128K x 8
Package Area (mm²) 166.8
Pb Free Category e3 Sn
Pitch (mm) 1.27
Pkg. Dimensions (mm) 21.95 x 7.6 x 2.67
Pkg. Type SOJ
Published No
Qty. per Carrier (#) 0
Qty. per Reel (#) 1000
Reel Size (in) 13
Requires Terms and Conditions Does not require acceptance of Terms and Conditions
Tape & Reel Yes
Temp. Range (°C) 0 to 70°C
Thickness (mm) 2.67
Width (mm) 7.6

Description

The 71V124 3.3V CMOS SRAM is organized as 128K x 8. The JEDEC center power/GND pinout reduces noise generation and improves system performance. All bidirectional inputs and outputs of the 71V124 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation.