Package Information
| CAD Model: | View CAD Model |
| Pkg. Type: | PLCC |
| Pkg. Code: | PL52 |
| Lead Count (#): | 52 |
| Pkg. Dimensions (mm): | 19.0 x 19.0 x 3.63 |
| Pitch (mm): | 1.27 |
Environmental & Export Classifications
| Pb (Lead) Free | No |
| Moisture Sensitivity Level (MSL) | 3 |
| ECCN (US) | |
| HTS (US) |
Product Attributes
| Lead Count (#) | 52 |
| Pb (Lead) Free | No |
| Carrier Type | Tube |
| Moisture Sensitivity Level (MSL) | 3 |
| Access Time (ns) | 20 |
| Architecture | Dual-Port |
| Bus Width (bits) | 8 |
| Core Voltage (V) | 5 |
| Density (Kb) | 16 |
| Function | Busy, Interrupt, Slave |
| I/O Type | 5.0 V TTL |
| Interface | Async |
| Length (mm) | 19 |
| MOQ | 240 |
| Organization | 2K x 8 |
| Package Area (mm²) | 361 |
| Pb Free Category | e0 |
| Pitch (mm) | 1.27 |
| Pkg. Dimensions (mm) | 19.0 x 19.0 x 3.63 |
| Pkg. Type | PLCC |
| Published | No |
| Qty. per Carrier (#) | 24 |
| Qty. per Reel (#) | 0 |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Tape & Reel | No |
| Temp. Range (°C) | 0 to 70°C |
| Thickness (mm) | 3.63 |
| Width (mm) | 19 |
Resources for 71421
Description
The 71421 is a high-speed 2K x 8 Dual-Port Static RAM with internal interrupt logic for interprocessor communications. It is designed to be used as a "SLAVE" Dual-Port RAM together with the 71321 "MASTER" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode.