Package Information
| CAD Model: | View CAD Model |
| Pkg. Type: | PQFP |
| Pkg. Code: | DR208 |
| Lead Count (#): | 208 |
| Pkg. Dimensions (mm): | 28.0 x 28.0 x 3.5 |
| Pitch (mm): | 0.5 |
Environmental & Export Classifications
| Pb (Lead) Free | No |
| Moisture Sensitivity Level (MSL) | 3 |
| ECCN (US) | |
| HTS (US) |
Product Attributes
| Lead Count (#) | 208 |
| Pb (Lead) Free | No |
| Carrier Type | Tray |
| Moisture Sensitivity Level (MSL) | 3 |
| Access Time (ns) | 12 |
| Architecture | Dual-Port |
| Bus Width (bits) | 36 |
| Core Voltage (V) | 3.3 |
| Density (Kb) | 1152 |
| Function | Interrupt |
| I/O Type | 3.3 V LVTTL |
| Interface | Async |
| Length (mm) | 28 |
| MOQ | 48 |
| Organization | 32K x 36 |
| Package Area (mm²) | 784 |
| Pb Free Category | e0 |
| Pitch (mm) | 0.5 |
| Pkg. Dimensions (mm) | 28.0 x 28.0 x 3.5 |
| Pkg. Type | PQFP |
| Published | No |
| Qty. per Carrier (#) | 24 |
| Qty. per Reel (#) | 0 |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Tape & Reel | No |
| Temp. Range (°C) | 0 to 70°C |
| Thickness (mm) | 3.5 |
| Width (mm) | 28 |
Resources for 70V657
Description
The 70V657 is a high-speed 32K x 36 Asynchronous Dual-Port Static RAM designed to be used as a stand-alone Dual-Port RAM or as a combination MASTER/ SLAVE Dual-Port RAM for 72-bit-or-more word system. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 72-bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode.