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Networking System Clock

Package Information

CAD Model: View CAD Model
Pkg. Type: QSOP
Pkg. Code: PCG20
Lead Count (#): 20
Pkg. Dimensions (mm): 8.7 x 3.8 x 1.47
Pitch (mm): 0.64

Environmental & Export Classifications

Moisture Sensitivity Level (MSL) 1
Pb (Lead) Free Yes
ECCN (US) EAR99
HTS (US) 8542.39.0090

Product Attributes

Lead Count (#) 20
Carrier Type Tube
Moisture Sensitivity Level (MSL) 1
Qty. per Reel (#) 0
Qty. per Carrier (#) 55
Pb (Lead) Free Yes
Pb Free Category e3 Sn
Temp. Range (°C) 0 to 70°C
Accepts Spread Spec Input No
Core Voltage (V) 3.3V, 5V
Die Form No
Feedback Input No
Input Freq (MHz) 25 - 25
Input Type Crystal, LVCMOS
Inputs (#) 6
Length (mm) 8.7
MOQ 165
Output Banks (#) 1
Output Freq Range (MHz) 25 - 125
Output Type LVCMOS
Output Voltage (V) 3.3V, 5V
Outputs (#) 8
Package Area (mm²) 33.1
Period Jitter Typ P-P (ps) 500
Pitch (mm) 0.64
Pkg. Dimensions (mm) 8.7 x 3.8 x 1.47
Pkg. Type QSOP
Prog. Clock No
Published No
Reference Output No
Requires Terms and Conditions Does not require acceptance of Terms and Conditions
Spread Spectrum No
Supply Voltage (V) 0 - 0
Tape & Reel No
Thickness (mm) 1.47
Width (mm) 3.8
Xtal Freq (KHz) 25 - 25
Xtal Inputs (#) 1

Description

The IDT 650-14 is a low cost, low jitter, high performance clock synthesizer customized for networking systems applications. Using analog/digital Phase-Locked Loop (PLL) techniques, the device accepts a 25 MHz clock or fundamental mode crystal input to produce multiple output clocks of one fixed 25 MHz, a four (plus one) frequency selectable bank, and two frequency selectable clocks. All output clocks are frequency locked together. The IDT650-14 outputs have zero ppm synthesis error.